AMD Versal RF Series adaptive SoCs target 6G wireless, aerospace, and electronics test equipment

AMD Versal RF series adaptive system-on-chips (SoCs) combines Arm Cortex-A72 and Cortex-R5F hard cores with FPGA fabric and direct radio frequency (RF)-sampling data converters for pre-6G systems, wireless 6G testers, aerospace and defense applications like radars, and electronics test equipment such as multi-channel testers, oscilloscopes, and wideband spectrum analyzers.

Built upon the Xilinx Zynq RFSoC devices, the AMD Versal RF Series supports wideband-spectrum with high-resolution thanks to up to sixteen 18 GHz, 14-bit RF ADCs with up to 32 GSPS and sixteen 14-bit RFV DACs up to 16 GSPS, and delivers 80 TOPS of DSP performance in a size, weight, and power (SWaP)-optimized design. The chips also integrate hard IP such as DDR5 memory controllers, 600 Gbps Ethernet, PCIe Gen5 x4, and various high-speed transceivers.

AMD Versal RF Series adaptive SoCs key features and specifications:

• Processing System
  • Application Processing Unit (APU) – Dual-core Arm Cortex-A72 with 48 KB/32 KB L1 Cache w/ parity & ECC, 1 MB L2 Cache w/ ECC
  • Real-Time Processing Unit – Dual-core Arm Cortex-R5F with 32 KB/32 KB L1 Cache and 256 KB TCM w/ECC
  • Memory – Memory 256 KB On-Chip Memory w/ECC
  • Peripherals
    • 2x Ethernet
    • 1x USB 2.0
    • 2x UART, 2x CAN-FD
    • 2x SPI,  2x I2C
• Programmable Logic
  • 1,205,400 or 2,473,800 system logic cells
  • 551,040 or 1,130,880 LUTs
  • 2,256 or 3,976 DSP58 digital signal processing (DSP) slices
• RF Data Converters
  • Up to 16x 14-bit RF-ADC with up to 32GSPS sample rate
  • Up to 16x 14-bit RF-DAC with up to 16GSPS sample rate
• AI Engines and Hard IP Functions
  • Up to 126 AI Engine Tiles
  • Up to 4x LDPC Decoders
  • Up to 320x Channelizers
  • Up to 40x FFT/iFFT
  • Up to 8x Polyphase Arbitrary Resamplers
• FPGA Memory, Transceivers, and Interfaces
  • Total PL Memory  – 156 or 189 Mbit
  • 4x DDR5/LPDDR5 memory controllers
  • Up to 12x GTYP Transceivers
  • Up to 8x (4x) GTM Transceivers (56Gbps (112Gbps))
  • Up to 20x (10x) GTMP Transceivers (56Gbps (112Gbps))
  • 2x 100Gbps Multi-rate Ethernet MAC
  • Up to 3x 600Gbps Ethernet MAC
  • PL PCIe Gen5 x4
• Packages
  • VSVG1596 – 37.5 x 37.5mm with 0.92mm ball pitch
  • VSVA2488 – 47.5 x 47.5mm with 0.92 ball pitch
• Commercial and Industrial-grade SKUs available

Four AMD Versal RF-series adaptive SoCs have been announced the VR1602, VR1652, VR1902, and VR1952 with key features and differences listed in the table below.

AMD Versal RF FPGA SoCs will be supported by the Vitis Unified Development Platform for Arm, FPGA, and AI accelerators in conjunction with the Vivado Design suite for lower-level FPGA development using HDL languages like VHDL and Verilog.

AMD says the Versal RF Series development tools are available now, but silicon samples and evaluation kits are only expected by Q4 2025, and volume production in H1 2027. That means that, as of December 2024, AMD has now nine Versal Series for its adaptive/FPGA SoC portfolio, sometimes with easy-to-confuse names…

Additional about the Versal RF series can be found on the product page and in the announcement.

Thanks to TLS for the tip.

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