Andes QiLai quad-core AX45MP RISC-V SoC with NX27V vector processor powers micro-ATX Voyager Development Platform

Andes’ Voyager Development Platform is a micro-ATX motherboard based on the company’s QiLai SoC with four AX45MP 64-bit RISC-V cores and an NX27V vector processor optimized for AI workloads.

The Voyager board supports up to 16GB of DDR4 via a UDIMM socket, features 16Mbit SPI Flash for boot code and an SD card socket, includes three PCIe Gen4 slots to connect external devices such as GPU card and SSD,  as well as a JTAG debugger and USB to UART bridge for debugging during Linux software development.

Andes QiLai RISC-V AI SoC

Before looking at the board itself, let’s check the Andes QiLai SoC specifications:

• CPU cores
  • Andes AX45MP-4C cluster
    • 4x RV64GC 8-stage superscalar processors clocked at 1.6 GHz (worse) / 2.1 GHz (typ.)
    • Support of MESI cache coherence protocol with Coherence Manager
    • 32KB L1 Instruction and Date cache
    • 2MB L2 cache
    • I/O Coherence Port (IOCP) – Synchronous AXI4 (256 bits data width)
    • Bus Interface – 256-bit AXI4 Memory Interface and Memory Mapped I/O (MMIO) Interface & 256-bit AXI-4 I/O Coherence Port (IOCP)
  • Andes NX27V
    • RV64 GCV 64-bit vector processor clocked at 1.1 GHz (worse) / 1.4 GHz (typ.) with a streamlined 5-stage scalar pipeline
    • 32KiB I-Cache, 512KiB D-Cache
    • Bus Interface – 256-bit AXI4
    • Vector Instruction Extension – VLEN/SIMD/MEM Width 512/512/512 & ELEN 64
• Memory
  • 4x 512KB SRAM
  • 16GB 64-bit DRAM (the block diagram implies it’s on-chip, but it’s unlikely, it it should be external up to 16GB external DDR4 memory)
  • DDR4 up to 3200MHz
• Storage I/F – 2x QSPI, SD
• Peripherals
  • Audio – I2S
  • Low-speed – 2x UART, 2x PWM, 2x I2C, 16x GPIO
  • High-speed
    • 1x PCIe Gen4 x4
    • 2x PCIe Gen4 x2
• Clocks – 32KHz Xtal (future use), 25MHz Xtal,  4x PLL, RTC, Watchog
• Power Consumption – 5 Watts under max load
• Process – 7nm TSMC

Voyager Development Platform

Voyager development board specifications:

• SoC – Andes QiLai as described above.
• System Memory – Up 16GB DDR4-1600/2400/3200 288-pin UDIMM module
• Storage
  • 256GB/512GB M.2 2280 NVMe SSD via PCIe x4 slot (using PCI Gen4 x2)
  • MicroSD card socket (push/pull type)
  • 2MB SPI flash
• USB
  • 1x USB Type-C port for AICE-MICRO USB JTAG Debugger 
  • 1x USB Type-C port for UART
• Expansion slots
  • PCIe x16 slot (PCIe Gen4 x4 interface) for graphics card
  • PCIe x4 slot (PCIe Gen4 x2 interface) for USB 3.0 or Ethernet card
  • PCIe x4 slot (PCIe Gen4 x2 interface) for M.2 NVMe SSD
• Misc
  • CR2032 battery holder for RTC
  • 2x 10-position DIP switches for SoC strap
  • Slide switch for power
• Power Supply
  • 24-pin ATX connector
  • ATX power supply of over 300 Watts
• Dimensions – 244 x 244mm (Micro-ATX form factor); 14-layer PCB

Andes explains the NX27V core can cooperate with the AX45MP cluster and make QiLai a heterogeneous software development platform where a Linux SMP system and an RTOS or bare-metal system can run simultaneously. Currently, the board is supported by the OpenSUSE Linux distribution, AndeSight toolchains, AndeSoft software stacks, and AndesAIRE NN SDK to convert AI/ML models using PyTorch, ONNX, or TensorFlow Lite formats to executables running on the NX27V vector processor.

QiLai RISC-V AI PC

I’ve come across the QiLai RISC-V AI SoC and Andes Voyager development board following the news that DeepComputer and Andes partnered to develop the world’s first RISC-V AI PC. However, since the information is rather light, and we only know the DeepComputer AI PC will be running Ubuntu Desktop on the QiLai SoC, I focused on the Voyager development platform in this post. It will certainly not match the performance of Windows-based AI PCs, but I’ll cover the RISC-V AI PC once it becomes available in early 2025.

Further details about the QiLai SoC and Voyager development platform may be found on the product page.

Thanks to TLS for the tip.

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