SOPHGO SG2000 and SG2002 are new SoCs featuring a bunch of RISC-V and Arm cores capable of running Linux, Android, and FreeRTOS simultaneously, and to maximize the fun an 8051 MCU core is also in the mix along with a 0.5 TOPS (SG2000) or 1 TOPS (SG2002) AI accelerator.
More specifically we have one 1GHz C906 64-bit core capable of running Linux, one 1GHz Arm Cortex-A53 for Linux or Android, another 700 MHz C906 RISC-V core for FreeRTOS, and a 300 MHz 8051-core for real-time I/Os, as well as 256MB or 512MB SiP DRAM. The chip is designed for AIoT applications such as Smart IP cameras, facial recognition, and smart home devices.
SOPHGO SG2000/SG2002 specifications:
- CPU cores
- 1x C906 64-bit RISC-V core @ 1GHz
- 1x C906 64-bit RISC-V core @ 700MHz
- 1x Arm Cortex-A53 core @ 1GHz
- MCU – 8051 8-bit microcontroller core @ 25 to 300 MHz with 6KB or 8KB SRAM (not sure about exact RAM capacity since it varies depending where I look)
- GPU – None
- VPU – H.265/H.264 video decoding and encoding (5M @ 30fps)
- ISP – 5M @ 30fps
- NPU – 0.5 TOPS for SG2000 or 1 TOPS for SG2002 (INT8)
- Memory (SiP) – 512MB DRAM for SG2000, 256MB for SG2002
- Storage – SPI NOR flash, SPI NAND flash, eMMC 5.0 flash, 2x SDIO 3.0
- Display interface – 2-lane MIPI DSI
- Camera interface – 4-lane or 2-lane+2-lane MIPI CSI
- Audio – 16-bit audio codec, 2x I2S/PCM, 1x DMIC
- Networking – 10M/100M Ethernet MAC PHY
- USB – 1x USB 2.0 DRD
- Low-speed peripherals – 5x UART, 4x SPI, 16x PWM, 1x IR, 6x I2C, 6x ADC, up to 128x GPIOs
- Security – Crypto, secure boot, TRNG, e-fuse
- Package – 10x10x1.3mm LFBGA with 0.65mm pitch, 205 pins
- Temperature Range – 0 to 70°C
We previously covered other higher-end RISC-V processors from SOPHGO with the 16-core SOPHGO SG2380 and the 64-core SG2042 found in the Pioneer RISC-V motherboard and workstation, while the new SG2000x are entry-level chips.
A Linux-5.10-based SDK is said to be available for the chip, but software resources don’t seem available right now, although the diagram below shows a bit of what to expect, including Arduino support for the 700MHz RISC-V core. The 512MB RAM will be really tight to run Android, Linux, and FreeRTOS… The technical reference manual (TRM) and hardware design documentation are available on the product page, but only in Chinese at this time.
At least three SBCs based on SG2000/SG2002 are in the works with Shenzhen MilkV Technology’s Duo S (SG2000) and Duo 256M (SG2002), and Sipeed’s LicheeRV Nano (SG2002). We’ll cover those in more detail once they become available.
[Update: I’ve just seen the LicheeRV Nano is already available for sale on Aliexpress with either Ethernet or WiFi 6, a Linux repo can be found on GitHub, as well as some documentation. I’ll check that in more detail soon…]
Jean-Luc started CNX Software in 2010 as a part-time endeavor, before quitting his job as a software engineering manager, and starting to write daily news, and reviews full time later in 2011.
Support CNX Software! Donate via cryptocurrencies, become a Patron on Patreon, or purchase goods on Amazon or Aliexpress
Well, that’s stupid.
Best summary.
> Well, that’s stupid.
Why? To me it sounded quite innovative.
They are all wildly different architectures, why does one need an equivalent class RiscV and ARM core. Waste of die space, because you’re not going to run a kernel across two different architectures. That’s the stupidity in the HP block.
If you’re having a secondary lower power CPU as RISCV you should only use the the high power RiscV core. Otherwise you’re in compiler hell, with a mess of different architectures in different situations. Why is there an RTOS CPU and then a separate and rubbish MCU?
Then third level of stupidity. You’re already licensing an ARM core, you might as well use an ARM MCU, or you’re using RISCV IP, you use a RISCV microcontroller. But no, you go for the most garbage/crufty architecture possible for the MCU.
I’m seeing it totally differently: the chip vendor must have thought “everybody supports A53, RISC-V support is still chaotic to say the least, let’s have both so that RISC-V enthousiasts can still have something that works out of the box and can switch it to native RISC-V later without replacing the hardware”.
From what I’ve seen that selectable boot mode is utter chaos. You’re stuck with a vendor custom solution and from what I understand it does not work very well.
And because it is non-standard, it is a massive pain to do it yourself.
You just need to solder one pin to switch the CPU. What I don’t know yet is what is provided in terms of software/boot loader etc for each core.
I’m guessing they have specific customers needing to load old ARM blob firmwares for peripherals (like RF basebands) but are otherwise interested in developing / migrating to RISC-V.
“and 8051 cores” … I thought ‘Wow, that’s a lot of cores!!!’.
But alas … just one / a few cores.
This thing makes no sense at all, why use 3 different ISAs!?
> SOPHGO SG2000 and SG2002 are new SoCs featuring a bunch of RISC-V and Arm cores capable of running Linux, Android, and FreeRTOS simultaneously
SG2000/2002 can not run Android because of the limited memory and lack of GPU.
Is the SG2000/SG2002 available for purchase anywhere? Or is this like the BL808 that’s not available to purchase? Also, why 3 different cores, that’s the exact same mistake the BL808 made.
Arace has those listed, but not in stock yet.
Found it. Thanks. Hopefully the SG2380 IC will be sold as well.
SOPHGO has just announced they’ve open-sourced the SDK for the SG2000 and SG2002, and also launched a bounty program:
https://www.linkedin.com/pulse/sg200x-series-sdk-officially-open-sourced-host-activities-waiting-your-gblkc/
It is not stupid, with TI processors they have a lot more cores, many arm cores and DSP. Those of us who know how to write software love the challenges with these.