Think Silicon NEOX|V is the First RISC-V ISA based GPU

We are seeing more and more RISC-V microcontrollers and processors hitting the market, but so far they all lacked a GPU for 3D graphics acceleration.

Think Silicon, the make of NEMA GPU for IoT and wearables, has now announced it will demonstrate NEOX|V GPU, the first RISC-V ISA based 3D, at the RISC-V Summit at the San Jose Convention Center, on December 10-12, in San Jose, California.

RISC-V GPUNEOX|V key features:

  • Parallel multi-core and multi-threaded architecture based on the RISC-V64GC ISA instruction set with adaptive NoC (Networks-on-Chip)
  • Configurable from 4 to 64 cores
  • Variety of cache sizes and thread counts organized in 1 to 16 cluster elements
  • Variety of cluster/core configurations with compute power ranging from 12.8 to 409.6 GFLOPS at 800 MHz
  • Support for FP16, FP32, and FP64 plus SIMD instructions

Beside 3D graphics, the RISC-V GPU can also be used for machine learning, vision/video processing, and open GPGPU compute framework applications.

NEOX|V SDK features System Verilog RTL, Integration Tests, LLVM C/C++ Compiler, and GCC C/C++ compiler. OpenGL ES and Vulkan frameworks are supported through the company’s GLOVE middleware.

The SDK also supports custom RISC-V instructions for computer graphics, compute and AI plus user-defined extensions, and NEOX|V RISC-V GPU can be evaluated on either Xilinx SoC FPGA platform or SW Cycle Accurate Simulator with supported operating systems including Linux, RTOS, and Google Wear OS.

There’s no product page at this stage, but more details should eventually show up on Think Silicon website.

Share this:
FacebookTwitterHacker NewsSlashdotRedditLinkedInPinterestFlipboardMeWeLineEmailShare

Support CNX Software! Donate via cryptocurrencies, become a Patron on Patreon, or purchase goods on Amazon or Aliexpress

ROCK 5 ITX RK3588 mini-ITX motherboard

3 Replies to “Think Silicon NEOX|V is the First RISC-V ISA based GPU”

  1. Is it same idea like what Broadcom use in their GPUs ? in raspberry pi for example?
    I think it is also some RISC arch

  2. Thie RISC-V graphic ISA was first introduced by Dr Atif Zafar during SIGGRAPH 2019 in July! You can find it on its website (Pixilica). It is an open source ISA and CNXSoft implemented this ISA without actually contributing to the open source project…

Leave a Reply

Your email address will not be published. Required fields are marked *

Boardcon Rockchip and Allwinner SoM and SBC products
Boardcon Rockchip and Allwinner SoM and SBC products