Intel announced their new Agilex FPGA family manufactured with a 10nm process earlier this April, but it only caught my eyes recently when I saw “Agilex SoC FPGA” listed in Linux 5.2 Arm’s changelog. The Intel SoC FPGA is there simply because it comes with four Arm Cortex-A53 cores.
Three family have been announced so far, although the later is shown as coming soon:
- Intel Agilex F-Series FPGAs and SoCs – Transceiver support up to 58 Gbps, increased DSP capabilities, high system integration, and 2nd Gen Intel Hyperflex architecture for a wide range of applications in Data Center, Networking, and Edge. Option to integrate the quad-core Arm Cortex-A53 processor.
- Intel Agilex I-Series SoC FPGAs – Optimized for high performance processor interface and bandwidth intensive applications. Coherent attach to Intel Xeon processors with Compute Express Link, hardened PCIe Gen 5 support and transceiver support up to 112 Gbps.
- Intel Agilex M-Series SoC FPGAs – Optimized for compute and memory intensive applications. Coherent attach to Intel Xeon processors, HBM integration, hardened DDR5 controller, and Intel Optane DC persistent memory support
The Intel Agilex F-series SoC FPGA has currently 7 SKUs that shared the following key features:
- Hard processor system – Quad-core 64-bit Arm Cortex*-A53 up to 1.5 GHz with 32 KB I/D cache, NEON coprocessor, 1 MB L2 cache, direct memory access (DMA), system memory management unit, cache coherency unit, hard memory controllers, 2x USB 2.0, 3x Gigabit EMAC, 2x UART x2, 4x SPI, 5x I2C, 7x general purpose timers, 4x watchdog timers
- Memory devices supported – DDR4, QDR IV, RLDRAM 3
- FPGA
- 392,000 to 2,692,760 Logic Elements
- Optional 36Mbit eSRAM memory block
- M20K memory blocks – 1,900 to 13,272 (259 Mbit)
- MLAB memory count – 6,644 to 45,640 (29.2 Mbit)
- 1.7 to 11.8 TFLOPS (single-precision)
- Up to 58 Gbps transceiver
- 1x F-Tile and optional 1x P-Tile PCIe hard IP blocks (Gen4x16 ) or bifurcateable 2X PCIe Gen4 x8 (EP) or 4X Gen4 x4 (RP)
- 2x to 4x F-Tile 10/25/50/100/200/400G Ethernet MAC + FEC hard intellectual property (IP)
You’ll find the full comparison from AGF 004 to AGF 027 in the product table.
The Intel Agilex I-series SoC FPGA currently has only 2 SKUs (AGI 022, AGI 027) with the following highlights:
- Hard processor system – Quad-core 64-bit Arm Cortex*-A53 up to 1.5 GHz with 32 KB I/D cache, NEON coprocessor, 1 MB L2 cache, direct memory access (DMA), system memory management unit, cache coherency unit, hard memory controllers, 2x USB 2.0, 3x Gigabit EMAC, 2x UART x2, 4x SPI, 5x I2C, 7x general purpose timers, 4x watchdog timers
- Memory devices supported – DDR4, QDR IV, RLDRAM 3
- FPGA
- 2,200,00 or 2,692,7 Logic Elements
- M20K memory blocks – 11,616 or 13,272 (259 Mbit)
- MLAB memory count – 32,788 or 45,640 (29.2 Mbit)
- 9.4 to 11.8 TFLOPS (single-precision)
- Up to 112 Gbps transceiver
- 3x F-Tile PCIe hard IP blocks (Gen4x16 ) or bifurcateable 2X PCIe Gen4 x8 (EP) or 4X Gen4 x4 (RP)
- 3x R-Tile PCIe hard IP blocks (Gen5x16 ) or bifurcateable 2X PCIe Gen5 x8 (EP) or 4X Gen5 x4 (RP)
- 2x F-Tile 10/25/50/100/200/400G Ethernet
Again you’ll find the detailed comparison between AGI 022 and AGI 027 in the product matrix.
There aren’t any details about the M-series at this stage. For a comparison between Intel Agilex and Intel (Altera) earlier’s Stratix FPGAs check out section 1.4 of the device overview.
AFAICT there aren’t any development kits yet with device availability expected for Q3 2019. More details may be found on the product page.
Jean-Luc started CNX Software in 2010 as a part-time endeavor, before quitting his job as a software engineering manager, and starting to write daily news, and reviews full time later in 2011.
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The datasheet also mentions up to 4×400 GE MACs per device, and the PCIe can also be Gen5 x16. This looks really impressive. One could make a smart 400GE NIC just out of this chip!
intel making arm … did anyone consult our lord blu before making this monstrosity!
I fail to see what is surprising.
Intel used to have ARM in their modems (before last generation). They also fabbed chips for other companies that contain ARM CPU.
Intel used to be ARM largest customer some years ago, back in 2010. https://www.eetimes.com/author.asp?section_id=36&doc_id=1266052#
https://www.merriam-webster.com/dictionary/joke
https://www.merriam-webster.com/dictionary/sarcasm
And yes I know. If you wanted to throw in some interesting trivia maybe you should have brought up that the 32bit ARMADA chips have MMX due to their Intel heritage or something..
Yep, they got it from DEC when they adopted the StrongARM that they renamed Xscale. Then they sold most of it to Marvell. Some might notice that some Marvell chips (like the Dove platform I think) still have the iwmmxt extensions which surprizingly reminds us “mmx” in the name, with an ‘i’ standing for ‘intel’ if my memory serves me right 🙂
It’s very funny to reread this 13 years later : https://www.theregister.co.uk/2006/06/27/intel_sells_xscale/
In short, Paul Otellini by then CEO didn’t believe in ARM in handheld devices and strongly believed in x86 to run Windows Vista… Unfortunately for his company the guy was not well inspired the morning he brought this idea, as 13 years later, handheld operating systems are spread between iOS and Android, both essentially running on ARM, nobody cares anymore about compatibility with legacy x86 applications, and even if they did, current CPUs are fast enough to emulate them at their original speed.
At some time in the future my comment awaiting moderation will be approved and you’ll see I knew exactly what someone would write…
Intel already had products with arm cores in it in 2002. See https://en.wikipedia.org/wiki/XScale
I still remember the ixp420, which was used in the Linksys NLSU2 NAS.
Later on they sold their arm stuff off to Marvell, but iirc they took a new license some years ago.
These are some very, *very* conservative clocks of the host CPU.. /on-topic
In today’s widening of dgp’s horizons: just because intel have bought the second largest fpga manufacturer does not mean that somehow the rules of the market have radically changed. For reference, see the largest fpga manufacturer: https://www.xilinx.com/products/silicon-devices/soc.html
In today’s episode of blu (and others) not understanding sarcasm so badly it’s painful:
>just because intel have bought the second largest fpga manufacturer does not mean
>that somehow the rules of the market have radically changed.
This is called reading far to much into things. The point is that no one except people that are far too emotionally involved in things that literally do not matter to anyone would care. Even Intel don’t care.
>https://www.xilinx.com/products/silicon-devices/soc.html
Xilinx will slap whatever core they can get that makes sense into their chips. Their Virtex chips used to have PPC hard cores. They probably only switched to ARM because PPC was a dead-end. Apple jumped ship for the same reason.
Notice how none of those ARM cores they have in their current line are particularly powerful.. they are just there because implementing “just enough processor to get the job done” eats up more of the FPGA than it’s worth.
Once RISC-V matures enough to overcome the market inertia it’s possible a lot of the lower/mid range lines of FPGAs with hard cores will move over. The weird off-brand Chinese vendors have already started doing it.
Definitely. I think everyone agrees. In short, they don’t care and just continue on an existing ecosystem which works fine enough for their newly acquired customers and it was easy for them due to already having a license. @dgp, maybe your sarcasm wasn’t easy enough to detect in your first message 🙂
>maybe your sarcasm wasn’t easy enough to detect in your first message
It was pretty obvious. Like literally getting whacked over the head with it while a massive siren screamed “this is saracasm, there is no need to clench your buttocks and bash at your keyboard with fists.. I repeat” in the background.
It’s always obvious to the author. Sorry about what you had to endure from that siren.
Oh you little rascal. Whatever will we do with you.
and FYI blu a lot of devices that use the Zynq etc are shipped in “joker” class volumes and therefore don’t exist to you.
Zynq is more to do with aircrafts and military.
These FPGA + CPU chips are popular for lots of low volume high cost products. Products where the run size doesn’t justify making an ASIC and the price is high enough to sink the high cost of the chip. Stuff like lab equipment and so on.
10nm process and they only managed to get 1.5GHz out of a Cortex-A53? Why an A53 even? I guess since ARM doesn’t have a core tuned for Intels process, Intel was free to pick any soft core they wanted and synthasize it for their process, but A53?
Perhaps because when Intel bought Altera, that design was already quite advanced in terms of development and so they kept the CPU chosen by Altera. There also is the existing software and dev tools to take into account.
A similar history happened when they bought Infineon modem division: many projects were already advanced and used ARM CPUs. But when they moved to their own designed chip for 5G they switched to Atom.
The difference here is that contrary to a modem chip, the CPU is visible to end user, so changing it might be quite difficult. We’ll see if they decide to switch in the future 🙂
That was my thought as well. I suspect they limited the CPU freq to whatever was strictly necessary for normal operations so that a wider gap with an Atom could be emphasized later.
pcie 5.0, ddr5 mmu, ~7-14GB/s transceiver bandwidth … usb 2.0 ?
In a a few years from now, I wouldn’t be surprised to see hard RISC V CPU cores added to FPGAS instead of ARM