FreeRTOS Kernel Now Supports RISC-V Architecture

FreeRTOS is one of the most popular operating systems found in embedded systems, and RISC-V open architecture is getting more and more traction, so it should come as no surprise that Amazon has now added RISC-V to their recently acquired FreeRTOS kernel.

Jeff Barr, Chief Evangelist for AWS, explains both 32-bit and 64-bit RISC-V cores are supported, and several RISC-V boards are already supported out of the box:

The kernel supports the RISC-V I profile (RV32I and RV64I) and can be extended to support any RISC-V microcontroller. It includes preconfigured examples for the OpenISA VEGAboard, QEMU emulator for SiFive’s HiFive board, and Antmicro’s Renode emulator for the Microchip M2GL025 Creative Board.

There’s no a lot of information on Amazon announcement post, but FreeRTOS website has plenty of resources to help you get started with RISC-V. The page also lists some of the key features of the RISC-V port:

• Supports machine mode integer execution on 32-bit RISC-V cores only, but is under active development, and future FreeRTOS releases will add features and functionality as required by our users.
• Implements a separate interrupt stack, and in so doing, greatly reduces RAM usage on small microcontrollers by removing the need for every task to have a stack large enough for both interrupt and non-interrupt stack frames.
• Provides a base port that can be easily extended to accommodate RISC-V implementation specific architecture extensions.

FreeRTOS v10.2.0 (and future versions) supports RISC-V, and you can download the OS here. Code specific to RISC-V can be found in /FreeRTOSv10.2.0/FreeRTOS/Source/portable/<compiler>/RISC-V/.

Via AB Open

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