Quokka FPGA IoT Controller is a board based on Altera Cyclone IV FPGA with a WiPy module for connectivity, and various I/Os that allows you to make robotics projects for example. While you could program the FPGA using VHDL, the developer – – also designed Quokka Development Toolkit (QDT), a cloud-based SaaS, allowing to program FPGA with a high-level programming language, currently C#, so that software people can more easily become involved in FPGA development.
Quokka IoT (preliminary) hardware specifications:
- FPGA – Intel Altera Cyclone IV, 6K logic elements, EP4CE6E22C8
- Clock – 50MHz
- Connectivity – WiFi via WiPy module
- Expansion
- 40x GPIO (3 banks by 8 pins, with direction and voltage (3.3V or 5V) configuration, 16 raw IO pins 3.3V)
- 2x Dual Channel 10 bit ADC (3.3V)
- 2x Dual Channel 10 bit DAC (3.3V)
- H-Bridge for DC motors with support for external power
- Power Supply – 5-24V DC input
The specifications are preliminary, because the FPGA may be replaced by one with more logic cells (e.g. 20K) depending on the popularity of the project. Drivers are available for each hardware component on the board including ADC and DAC drivers, UART, JSON serializer\deserializer and much more.
As mentioned in the introduction, C# programming is possible with QDT, and it’s not limited to Quokka IoT board, so you should be able to use it with other FPGA boards, although a license may be required as we’ll see below.
You can watch a short demo of the board in action while attached to a robotic chassis.
The project has launched on Kickstarter with a $30.000 AUD funding goal (~$23,600 US). Rewards start at 150 AUD ($118 US) for Quokka IoT board only, but if you want to use the board with QDT, you’d need to add 50 AUD extra for a total of 200 AUD (~$158 US). Shipping adds 25 AUD ($19.7 US), and delivery is scheduled for May 2018.
Thanks to TLS for the tip
Jean-Luc started CNX Software in 2010 as a part-time endeavor, before quitting his job as a software engineering manager, and starting to write daily news, and reviews full time later in 2011.
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Heh. Nice that they let you do C#. Problem is that this may/may not have issues on resource (Cells, DSP slices, etc.) use because most (though not all) HLS items are typically crippled versions of the language or the language doesn’t map efficiently to FPGAs.
If you find VHDL or Verilog is not your speed…
Perhaps Haskell (www.clash-lang.org) or Scala (https://spinalhdl.github.io/SpinalDoc/) is more your speed. These are higher-level HDLs that’re better, more expressive than Verilog or VHDL, and in the case of CLaSH, you can use an extensive subset of Haskell and it will efficiently express it as Verilog or VHDL to drop into a design or to use as your toplevel.