Texas Instruments Sitara AM335x SoCs integrate an ARM Cortex A8 processor @ up to 1GHz with a PRU-ICSS for industrial communication, but also include a display controller, an optional PowerVR GPU, and a rich-set of peripherals making it useful for a wide range of applications. The company has now launched AMIC110 Sitara processor with a Cortex A8 core @ 300 MHz, and a PRU-ICSS specifically designed for industrial Ethernet, and fieldbus communication.
Texas Instruments AMIC110 Sitara processor key features and specifications:
- CPU – ARM Cortex-A8 processor @ up to 300 MHz with NEON, 32+32KB I/D cache, 256KB L2 cache, 176KB boot ROM, 64KB RAM
- External Memory Interfaces (EMIF) – mDDR(LPDDR), DDR2, DDR3, DDR3L Controller up to 1GB
- General-Purpose Memory Controller (GPMC) – 8-bit & 16-bit Asynchronous Memory Interface with up to Seven Chip Selects (NAND, NOR, Muxed-NOR, SRAM)
- 2x programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-ICSS) supporting EtherCAT, PROFIBUS, PROFINET, EtherNet/IP, and more (10 communication standards in total)
- Misc – Power, Reset, and Clock Management (PRCM) Module; Real-Time Clock (RTC)
- Peripherals
- Up to 2x USB 2.0 OTG Ports
- Up to 2x Controller-Area Network (CAN) Ports v 2 Part A & B
- Up to 2x Multichannel Audio Serial Ports (McASPs)
- Up to 6x UARTs, up to x3 I2C Master and Slave Interfaces
- Up to 2x Master and Slave McSPI Serial Interfaces
- Up to 3x MMC, SD, SDIO Ports
- Up to 4x Banks of General-Purpose I/O (GPIO) Pins with 32 GPIO pins per bank
Up to 3x External DMA Event Inputs that can Also be Used as Interrupt Inputs - 8x 32-Bit General-Purpose Timers
- Watchdog Timer
- 12-Bit Successive Approximation Register (SAR) ADC
- DMA controller
- Device Identification with Electrical Fuse Farm (FuseFarm)
- Debug Interface Support – JTAG and cJTAG for ARM, PRU-ICSS Debug, supports Device Boundary Scan; supports IEEE 1500
- Security – Secure Boot
- Package – 324-Pin S-PBGA-N324 Package (ZCZ Suffix), 0.80-mm Ball Pitch
AMIC110 supports high-level operating systems (HLOS) with Linux and TI-RTOS available free of charge from TI, but other RTOS are supported by partners. While AMIC110 microprocessor can work in standalone mode, it may be used in conjunction with TI C2000 MCUs over SPI for “connected drives” (e.g. motors) as shown in the diagram below.
In order to get started and/or evaluate the new processor, Texas Instruments can also provide AMIC110 ICE (Industrial Communication Engine) evaluation board with the following features:
- SoC – AMIC110 SoC featuring Sitara ARM Cortex-A8 and PRU-ICSS
- System Memory – 512 MByte DDR3
- Storage – 8 MByte SPI flash
- Connectivity – 2x 10/100M industrial Ethernet connectors with external magnetics
- Communication with optional host processor – 3.3V SPI interface to any host processor such as TI C2000
- Debugging – 20-pin JTAG header to support all types of external emulator
- Power Supply – 5-V input supply, single chip power management IC TPS650250 to power entire board and dual DP83822 PHYs
- Certifications – RoHS and REACH compliant design; EMC-compliant, industrial temp dual port EtherCAT slave with SPI interface
Fully documentation with user guides, hardware design files (schematics, PCB layout, Gerber files..), development tools. and software can be downloaded from Technical Documents section of the board’s page.
TI AMIC110 Sitara processor SoC sellers for $6.75 per unit for 1K order, and the development board can be purchase for $195. Visit Texas Instruments AMIC110 product page for further details.
Via LinuxGizmos
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Did I read that right? 300MHz A8? It had better have a wicked good DMA engine and a lot of offload for crypto and networking.
AMIC110 is the same silicon die as AM33xx Sitara parts – TI did said somewhere in the AMIC docs that users should not activate blocks that are “not present” in AMIC specs even if peripherals of AM33xx is in fact there and “responds” to register access.
300MHz is slower than Sitara but this is related to the use cases – industrial automation. I believe this limit is there because of the wider temperature range that the AM33xx Sitara parts. Definately this chip is not intended for number crunching. If more CPU power is needed one can always switch to AM33xx and get higher clock rates.
@willmore
Why is that? Circa 2005/2006 the 266Mhz Intel XScale ARM processor was used in quite a few VPN router firewalls where it performed more than adequately.
@Ray Knight
Because we do a lot of crypto these days that we didn’t do in the 2005/2006 era because it took up so much CPU. If you’re going to throw a low performance CPU at that same segment now, you had better either improve the CPU performance several factors or provide hardware resources to do that crypto for you.
If your network performance hasn’t increased any since that time frame, well, then, you might want to look into that.
@willmore The industrial protocols this chip is aimed at don’t use crypto. It’s not a general purpose network chip; it’s aimed at industrial automation using standards such as EtherCAT, Ethernet PowerLink, Sercos III, Profinet, and Ethernet/IP. The only close competitor is Hilscher’s netX chips, which aren’t any faster, or protocol-specific chips (such as Microchip’s EtherCAT I/O chip, Renesas Cortex-M4 with more limited field bus support, or Infineon’s chip with EtherCAT support).
@TonyT
You are right – no one is daring to put industrial controller or drive directly in the wild Internet – always some kind of border gateway that will serve TLS1.2 and will be able to be easily upgraded to 8-core 2+Ghz to support next year crypto algos.
Hilscher is preparing a new chip – netX4000 (expected release 2017, but who knows, original plans were for 2014). At least they finally have some alpha chips for internal testing and “close to the heart” partners.
It “will” have A9 core for GPOS(Linux) and M7 core for real time tasks. Still including XC units for real time communication. They could not push it quite high because of the industrial context – maybe 600MHz. But this is also true for industrial range Zynq variants?
They have a repo on GitHub (named “Hilscher” – could you guess) and a lot of work on Linux for netx4000 is going on there. Kernel is at least something of the 4.x series with preempt_rt support.
it will be a killer chip if they succeed to finish it. Or, if they don’t, I am afraid they will fade out – the old line (netX5x) could not battle with new offerings – like Sitara. Also the price will be a factor – TI push the prices low so Hilscher should not request much more than the AM47xx line.
Also Anybus have some multi-protocol chips but I thing those are MCU+FPGA based (SmartFusion or SmartFusion2). Very well developed and supported product but the is close to a Zynq solution.
Renesas have some semi-multiprotocol solutions too.
I see the TI is marketing the AMIC with idea of it being ONLY the communication processor – and requires a motion processor in the form of C2000 part. I believe the AMIC/Sitara has all required peripherals for high end (FOC) motion control and this was marketed on Sitara line (single chip ethercat drive). Wondering if something is missing on the AMIC or the CPU power is expected to be too low, or it is just a marketing trick to keep Sitara parts attractive?
@gicho
TI already has a very powerful chip with real time Ethernet, the AM5728; it has dual core Cortex-A15, dual core C66x DSP, and a lot more. It’s used in the BeagleBoard X15, which is finally shipping.
If I recall correctly, the Renesas MCU doesn’t support as many protocols as TI or Hilscher.
The Sitaras should work fine for motion control, but note that the AMIC110 doesn’t appear to have quadrature encoder inputs. TI also provides a lot better software support for motion control on the C28x DSPs.
The new TSN (time sensitive network) Ethernet standards should have a big impact within 5-10 years, and some of the groups such as Profinet, Ethernet/IP, and Sercos are already trying to take advantage of TSN.
Full discloser I work for Hilscher.
Linux Development Board for the netX 4000 available end of Q3/17
Samples netX 4000 available end of 2017
1 company, 7 chips, 17 different protocol stacks (master and slaves), one driver interface
TSN is one aspect, new designs should have provisions for security/encryption and IIoT connectivity