Renesas R-Car H2 is an Octo Core big.LITTLE Processor for Your Car

Renesas announced a new automotive SoC called the R-Car H2 that features 4 Cortex-A15 cores together with 4 Cortex A7 cores (optional) in big.LITTLE configuration, as well as an Imagination PowerVR Series6 G6400 GPU. This SoC can optionally come with Renesas SH-4A, a real-time processing CPU core acting as a multimedia engine (MME) , and Renesas’ IMP-X4 core, a real-time image processing unit that enables developers to implement augmented reality application such as 360-degree camera views and image recognition.

This Renesas processor is a multimedia power house, as it can handle 4x 1080p video en/decoding, including Blu-Ray support at 60 frames per second, as well as image/voice recognition and high-resolution 3D graphics with virtually no CPU usage.

Here are R-Car H2’s specifications provided on Renesas website:

Product number	R8A7790x
Power supply voltage	3.3/1.8 V (IO), 1.5/1.35 V (DDR3), 1.0 V (Core)
CPU core	ARM Cortex-A15 Quad	ARM Cortex-A7 Quad (device option)	SH-4A core (device option)
Cache memory	L1 Instruction cache: 32 KB L1 Operand cache: 32 KB L2 Cache: 2 MB	L1 Instruction cache: 32 KB L1 Operand cache: 32 KB L2 cache: 512 KB	Instruction cache: 32 KB Operand cache: 32 KB
External memory	DDR3-SDRAM Maximum operating frequency: 800 MHz Data bus width: 32 bits × 2 ch (6.4 GB/s × 2)
Expansion bus	Flash ROM and SRAM, Data bus width: 8 or 16 bits
	PCI Express 2.0 (1 lane)
Graphics	PowerVR Series6 G6400 (3D)
	Renesas graphics processor (2D)
Video	Display Out × 3 ch (2 ch: LVDS, 1 ch: RGB888)
	Video Input × 4 ch
	Video codec module (H.264/AVC, MPEG-4, VC-1)
	IP conversion module
	JPEG accelerator
	TS Interface × 2 ch
	Video image processing (color conversion, image expansion, reduction, filter processing)
	Distortion compensation module (image renderer) × 4 ch
	High performance Real-time Image recognition processor (IMP-X4) (device option)
Audio	Audio DSP
	Sampling rate converter × 10 ch
	Serial sound interface × 10 ch
	MOST DTCP
Storage Interface	USB 3.0 Host interface × 1 port (wPHY)
	USB 2.0 Host interface × 3 port (wPHY)
	SD Host interface × 4 ch (SDXC, UHS-I)
	Multimedia card interface × 2 ch
	Serial ATA interface × 2 ch
In car network and automotive peripherals	Media local bus (MLB) Interface × 1 ch (6pin / 3pin interface selectable)
	CAN Interface × 2 ch
	IEBus Interface
	GPS baseband module (Galileo, GLONASS) (device option)
	Ethernet controller AVB (IEEE802.1BA, 802.1AS, 802.1Qav and IEEE1722, GMII/MII, without PHY)
Security	Crypto engine (AES, DES, Hash, RSA)
	SecureRAM
Other peripherals	DMA controller LBSC DMAC: 3 ch / SYS-DMAC: 30 ch / RT-DMAC: 3 ch / Audio-DMAC: 26 ch / Audio (peripheral)-DMAC: 29 ch
	32bit timer × 12 ch
	PWM timer × 7 ch
	I2C bus interface × 8 ch
	Serial communication interface (SCIF) × 10 ch
	Quad serial peripheral interface (QSPI) × 1 ch (for boot)
	Clock-synchronized serial interface (MSIOF) × 4 ch (SPI/IIS)
	Ethernet controller (IEEE802.3u, RMII, without PHY)
	Interrupt controller (INTC)
	Clock generator (CPG) with built-in PLL
	On chip debugger interface
Low power mode	Dynamic Power Shutdown (CPU core, 3D, IMP) AVS and DVFS function DDR-SDRAM power supply backup mode
Package	831 pin Flip Chip BGA (27 mm × 27 mm)

For development, Renesas provides ICE for ARM CPU, as well as an evaluation board including car information system-oriented peripheral circuits. The platform supports QNX Neutrino RTOS, Windows Embedded Automotive, and Linux.

Renesas R-Car H2 samples are available now, and mass production is scheduled for mid-2014. More information is available on on Renesas R-Car H2 page.

Via Embedded.com

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