arm techcon 2015

Posted on by Jean-Luc Aufranc (CNXSoft) - 3 Comments on Ambiq Micro Apollo Low Power MCUs Promise Cortex M4F Performance at Cortex M0+ Energy Efficiency

Ambiq Micro Apollo Low Power MCUs Promise Cortex M4F Performance at Cortex M0+ Energy Efficiency

Ambiq Micro is a US company founded in 2010 that focuses on “extremely low power” semiconductors leveraging their patented Subthreshold Power Optimized Technology (SPOT) platform. Earlier this year, they announced their first low power Cortex-M4F MCU Apollo family with claims of 5 to 10 times lower power consumption compared to other micro-controllers with the same performance. According to an EETimes article, they’ve at least partially backed their claims with a live demonstration at ARM TechCon 2015.   Before checking out the test results, let’s have a look at the main features of Apollo MCU family: 32-bit ARM Cortex-M4F processor @ up to 24 MHz, with FPU, and wake-up interrupt controller with 12 interrupts Up to 512KB flash, 64-KB low-leakage RAM “Rich set of timing peripherals” Peripherals I2C/SPI master; I2C/SPI; UART; 10-bit, 13-channel, 1MS/s ADC Temperature sensor with ±2°C accuracy Voltage Range –  1.8 to 3.8V Power Consumption: active mode: 30µA/MHz (executing […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 4 Comments on ARM Introduces Cortex A35 64-bit Low Power Core, ARMv8-M Architecture for Secure MCUs

ARM Introduces Cortex A35 64-bit Low Power Core, ARMv8-M Architecture for Secure MCUs

ARM TechCon 2015 has just started, and there have been a few announcements including the launch of a Cortex-A7 replacement with Cortex A35 providing 10% lower power consumption, 6 to 40% performance boost, and a better design flexibility making it suitable for SoC for smartphones to wearables. The main specifications of Cortex A35 cores: Architecture ARMv8-A (AArch32 and AArch64 ) Multicore 1-4x SMP within a single processor cluster, and multiple coherent SMP processor clusters through AMBA 5 CHI or AMBA 4 ACE technology ISA Support AArch32 for full backward compatibility with ARMv7 AArch64 for 64-bit support and new architectural features TrustZone security technology NEON Advanced SIMD DSP & SIMD extensions VFPv4 Floating point Hardware virtualization support Debug & Trace CoreSight DK-A35 The new core can both be used in quad core configuration at 1 GHz for a smartphone (90 mW per core), or in single core configuration at 100 MHz […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 1 Comment on ARM TechCon 2015 Schedule – IoT, Servers, 64-bit ARM, Power Usage Optimization, and More

ARM TechCon 2015 Schedule – IoT, Servers, 64-bit ARM, Power Usage Optimization, and More

The ARM Technology Conference (ARM TechCon) will take place on November 10 – 12, 2015, in Santa Clara Convention Center, and just like every year, there will be a free exposition for companies to showcase their latest innovation and/or products, as well as a technical conference with sessions and workshops sorted into various tracks: Automotive/Embedded Vision Embedded IoT Mobile/Connectivity Networking Infrastructure/Servers Tools & Implementation Wearables/Sensors ARM Training Day Sponsored Vendor Training Special Event General Event Software Developers Workshop You can find the complete schedule on ARM TechCon website. Although I won’t attend, I’ve created my own virtual schedule with some of the sessions I found interesting. Tuesday – November 10 8:30 – 9:20 – ARM Vision for Thermal Management and Energy Aware Scheduling on Linux by Ian Rickards (ARM), Charles Garcia-Tobin (ARM), Bobby Batacharia (ARM) This talk will cover the history and where are we going, for ARM’s Power Software (IPA, […]

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