EU funded AXIOM Board is Powered by Xilinx Zynq UltraScale+ FPGA + ARM SoC

Back in 2015, Xilinx unveiled Zynq Ultrascale+ MPSoC combining ARM Cortex A53 & Cortex R5 cores, a Mali-400MP2 GPU, and UltraScale FPGA, and the company recently launched ZCU102 Evaluation Kit based on the SoC, which sells for just under $3,000. But if you are based in the European Union, you’ll be glad to learn about 4 millions Euros of your taxes have been spent to design a board based on the same MPSoC family as part of the AXIOM project, which was developed in collaboration with European universities and companies with the “aim of researching new software/hardware architectures for Cyber-Physical Systems (CPS) to meet the expectations” in terms of computational power, energy efficiency, scalability through modularity, easy programmability, and leverage of the best existing standards at minimal costs. AXIOM (Agile, eXtensible, fast I/O Module) board’s key specifications: SoC – Xilinx Zynq Ultrascale+ ZU9EG MPSoC with four ARM Cortex A53 cores […]

NovaVGA Shield Adds VGA Output to Arduino Boards

Arduino boards are convenient to control I/Os, link LEDs, and display info on small LCD displays, but if you want to output data to a larger monitor, it’s a bit more complex. NovaVGA shield for Arduino simplify the task of outputting data to a VGA monitor over SPI. NovaVGA shield hardware specifications: CPLD – Xilinx XC9572XL CPLD, user programmable via JTAG interface. SRAM Framebuffer – 160×120 pixels @ 6-bit color (2^6 = 64 possible colors) VGA Output – 640×480 @ 60Hz physical resolution (25.175MHz pixel clock) Interface with MCU – SPI mode 1 interface (consumes only three Arduino pins) Header pins not included MicroNova provides an Arduino library with various examples such as color palette, Mandelbrot, Tetris and text console, as well as a user’s guide and PDF schematics that can all be downloaded directly on the product page. NovaVGA shield sells for $29 on Tindie or directly on MicroNova […]

SiFive Introduces Freedom U500 and E500 Open Source RISC-V SoCs

Open source used to be a software thing, with the hardware design being kept secret for fear of being copied, but companies such as Texas Instruments realized that from a silicon vendor perspective it would make perfect sense to release open source hardware designs with full schematics, Gerber files and SoM, to allow smaller companies and hobbyists, as well as the education market, normally not having the options to go through standard sales channels and the FAE (Field Application Engineer) support, to experiment with the platform and potentially come up with commercial products. That’s exactly what they did with the Beagleboard community, but there’s still an element that’s closed source, albeit documented: the processor itself. But this could change soon, as SiFive, a startup founded by the creators of the free and open RISC-V architecture, has announced two open source SoCs with Freedom U500 processor and Freedom E300 micro-controller. Freedom […]

OpenAMP Open Source Framework Provides the Glue between Linux, RTOS, and Bare Metal Apps in Heterogeneous SoCs

SoCs becoming more complex, and go beyond homogeneous multicore systems by mixing different type of cores such as high performance cores, low power real-time cores, or even FPGA fabric. Examples include NXP i.MX6 SoloX with an ARM Cortex A9 core for Linux apps, and an ARM Cortex M4 core for real-time tasks, or Xilinx Zynq UltraScale+ MPSoC with Cortex A53 core for higher level apps, Cortex R5 cores for real-time processing, and Ultrascale FPGA logic. All these different cores are running their own Linux based OS, real-time operating system or bare metal application, and all this makes software development an even greater difficult tasks. In order to reduce the complexity, and address some of the issues, the Multicore Association has launched a new working group targeting the management, expansion, and standardization of  OpenAMP (Open Asymmetric Multi Processing), an open source framework that allows operating systems to interact within a broad […]

Digilent ARTY is a $99 Xilinx Artix-7 FPGA Board with Arduino Headers

Low cost FPGA boards with Arduino headers are nothing new, as we’ve seen before with Arduissimo and Papilio DUO, but both of these boards are based on Spartan 6 FPGA, while the recent Digilent ARTY board is powered by an Artix-7 FPGA. Beside the hardware differences, Spartan 6 FPGAs only support Xilinx ISE Design Suite, while Artix-7 parts are also supported by Vivado Design Suite, which according to Xilinx has a much better workflow and user interface. Digilent ARTY specifications: FPGA – Xilinx XC7A35T-L1CSG324I with 33,280 logic cells, 1,800 Kb block RAM, 90 DSP slices, and 250 I/O pins System memory – 256 MB DDR3L SDRAM Storage – 16 MB of QSPI Flash Connectivity – 10/100M Ethernet Expansion interfaces 4 Digilent compatible Pmod interfaces enabling 32 user I/O pins: 2 Pmods routed as differential pairs, paired to fit dual-wide Pmods Arduino UNO R3 shield / chipKit interface Debugging – USB-UART Interface, […]

Xilinx Introduces Zynq UltraScale+ MPSoC with Cortex A53 & R5 Cores, Ultrascale FPGA

Xilinx Zynq-7000 dual core Cortex A9 + FPGA SoC family was announced in 2012, and provides a wide range of SoC with features and price range, and led to low cost ARM + FPGA such as ZedBoard, and more recently Parallela and MYiR Z-Turn boards. The company unveiled its successor with Zynq UltraScale+ MPSoC providing five times more performance per watt, with four ARM Cortex A53 cores, two ARM Cortex R5 real-time MCU cores, a Mali-400MP GPU, an UltraScale FPGA fabric manufactured with 16nm FinFET+ process. There are two main sub-families in Zynq Ultrascale+ MPSoC for “smarter control & vision”, and “smarter network”. Both share the same processing systems (CPU, GPU, MCU, Peripherals, Security), but the networking family has beefier FPGAs,  and lacks the H.264/H.265 video processing unit found in the control & vision version: Processing Systems Processor – Quad ARM Cortex A53 MPCore up to 1.3GHz Real-time Processor – […]

PicoZed System-on-Modules are Powered by Xilinx Zynq-7000 ARM + FPGA SoC

After the Zedboard, and the Microzed, here comes PicoZed, a family of system-on-modules (SoM) based on Xilinx Zynq-7000 SoCs featuring a dual core Cortex A9 processor and FPGA fabric. The module also comes with 1GB RAM, 4GB eMMC, Gigabit Ethernet PHY, various user I/O, and more. Target applications include embedded vision, test & measurement, motor control, software-defined radio, and industrial automation. Four modules are available with support for commercial or industrial temperature ranges, all sharing the following specifications: SoC (depending on module) Xilinx Zynq-7010 with two Cortex-A9 cores @  866MHz, FPGA with 28K Logic Cells Xilinx Zynq-7015 with two Cortex-A9 cores @  866MHz, FPGA with 74K Logic Cells, 4 transceivers @ 6.25 Gb/s Xilinx Zynq-7020 with two Cortex-A9 cores @  866MHz, FPGA with 85K Logic Cells Xilinx Zynq-7030 with two Cortex-A9 cores @  1GHz, FPGA with 125K Logic Cells, up to 4 transceivers @ 12.5 Gb/s System Memory – 1GB […]

Adapteva Announces Three Parallella Fanless Boards for Microserver, Desktop, and Embedded Applications

Adapteva’s Parallella low cost open source hardware “supercomputer” is a board powered by Xilinx Zynq-7010/7020 dual core Cortex A9 + FPGA SoC and the company’s Ephipany epiphany coprocessor, that’s had a successful Kickstarter campaign in 2012 as the 16-core version sold for just $99, and is capable of handling applications such as image and video processing, and ray-tracing, and also comes with an OpenCL SDK. The board was fairly difficult to source after the crowdfunding campaign, and one the common complain of backers was the board had to be actively cooled by a fan. The company has fixed both issues by increasing slightly the price, and redesigning the board so that it can be passively cooled by a larger heatsink. There are now three versions of the parallela board: Parallella Microserver ($119) – Used as an Ethernet connected headless server Parallella Desktop ($149) – Used as a  personal computer Parallella […]

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