tool News - Page 3 of 13 - CNX Software

March 10, 2021 by Jean-Luc Aufranc (CNXSoft) - 2 Comments

Xilinx open sources Vitis HLS FPGA tool (Front-end only)

While there are some open-source programs for FPGA development such as Symbiflow or Yosys, FPGA vendors usually only provide closed-source programs for developers wanting to work on their chips. But Xilinx has recently made a move to fulfill its “commitment to supporting open-source initiatives for developers and researchers” with the release of the source code of Vitis HLS Front-End. What is Vitis HLS exactly? Before we look at the source code release, we may want to know what Vitis HLS does exactly. The company describes it as a high-level synthesis (HLS) tool that allows C, C++, and OpenCL functions to become hardwired onto the device logic fabric and RAM/DSP blocks. It implements hardware kernels in the Vitis application acceleration development flow, and to use C/C++ code for developing RTL IP for FPGA designs in the company’s Vivado Design Suite. Vitis HLS design flow goes as follows: Compile, simulate, and debug […]

January 20, 2021 by Jean-Luc Aufranc (CNXSoft) - No Comments

Little Bee is an affordable, open hardware current & magnetic field probe (Crowdfunding)

Little Bee is an affordable, open-source hardware, and high-performance current probe and magnetic field probe designed to debug and analyze electronic devices at a much lower cost than existing solutions such as Migsic CP2100B or I-prober 520. This type of tool is especially important for power electronics, which has become ever more important with electric vehicles, alternative energy solutions, and high-efficiency power supplies. Little Bee B1 hardware specifications and key features: Based on Anisotropic Magneto-Resistive (AMR) magnetic sensor. Adjustable bandwidth (10 MHz and 1 MHz) Adjustable gain (1x and 4x) Automatic zeroing SMA Output Connector for connection to any standard 1 MΩ impedance oscilloscope input Current sensing Bandwidth – DC – 10 MHz Sensitivity – 0.25 Volts/Amp Max Current – +/- 5 A Noise – 3 mA RMS at 10 MHz bandwidth, 2 mA RMS at 1 MHz bandwidth DC Accuracy – +/- 15% Insertion Impedance – 100 nH in […]

January 17, 2021January 17, 2021 by Saumitra Jagdale - 2 Comments

Voltage Measurement HAT for Raspberry Pi offers 16-bit analog inputs

MCC-128 Voltage Measurement HAT for Raspberry Pi

MCC has launched the MCC 128 voltage measurement DAQ HAT for Raspberry Pi for data acquisition and data logging systems. It includes 8 analog inputs with 16-bit resolution for a range of -10V to +10 V at the data rate of 100 kS/s. This data rate can be increased by stacking up to 8 HATs for 64 channels of data which can produce a faster data rate up to 320 kS/s. The MCC 128 DAQ HAT is compatible with all Raspberry Pi models with the 40-pin GPIO header, excluding the original Pi 1 A or B with the 26-pin header. It is recommended to use the SPI interface for connecting LCD displays using the GPIO header. The configuration parameters of the board are stored in the EEPROM to allow automatic set up of GPIO pins to Raspberry Pi after the connection of the device. Key Features of MCC 128 DAQ […]

January 15, 2021January 15, 2021 by Jean-Luc Aufranc (CNXSoft) - 3 Comments

USB2IO high-speed interface explorer tool combines Intel Cyclone 10 FPGA and STM32H7 MCU

In the second part of 2020, we’ve seen a fair amount of USB debugging tools for electronics designers and hardware hackers including the Glasgow Interface explorer with an ICE40 FPGA. But if you need even more flexibility or higher I/O speeds (up to 300 MHz), DAB Embedded USB2IO interface explorer should help thanks to the combination of an STMicro STM32H7 MCU and an Intel Cyclone 10 FPGA. USB2IO interface explorer hardware specifications: MCU – STMicro STM32H743 Arm Cortex-M7 @ 480MHz CPU clock An external 64MB QSPI flash for extra FPGA code storage; FPGA – Intel Cyclone 10LP (10CL040) with 40k logic elements, 1,134 Mbit embedded memory, 126 DSP blocks External memory – 32MB SDRAM for MCU and FPGA (64MB in total) Storage – 64MB QSPI for connected to MCU for FPGA code storage I/Os via 20-pin external header/connector 16 x GPIO mode (single-ended), 8x LVDS pair mode or a mix […]

January 5, 2021January 5, 2021 by Jean-Luc Aufranc (CNXSoft) - 24 Comments

Balena EtcherPro multi SD card writer now up for pre-order

We first wrote about Balena EtcherPro in December 2018, as a relatively low-cost multi-SD card writer, designed by Balena for people who needed to flash several micro SD cards, USB drives, or boards. At the time, mass production was scheduled for Q2 2019. But it took a bit more time than expected, and the company is only now taking pre-orders for the device with a $50 deposit, and $990 price tag excluding VAT and shipping. EtcherPro highlights and specifications: Display – 7-inch RGB touch screen for control Ports – 16x USB 3.0, 16x SD card slots, 16x MicroSD card slots to flash up to 16 drives/devices at once Flash at speeds up to 52MB/s when flashing 16 drives/devices simultaneously, or up to 200MB/s for a single drive/device Supports SD, microSD, USB drives, and single-board computers (or compute modules via carrier boards) Flash an image from a physical drive source or […]

December 31, 2020December 30, 2020 by Jean-Luc Aufranc (CNXSoft) - 4 Comments

Protocol Droid is a USB bridge board to I2C, CAN Bus, RS485, UART, SPI, etc. (Crowdfunding)

We’ve seen some interesting USB hardware hacking/debugging boards in the last two months with Tigard, Ollie, and Glasgow Interface Explorer each with their own price point and features, but with the goal of replacing multiple other programming or debug boards you may need for your projects. Protocol Droid is another one of such USB boards for electronics designers and hardware hackers. It offers I/O connectivity via terminal blocks for I2C, CAN Bus, RS485, UART, SPI, and other interfaces. Protocol Droid key features and specifications: MCU – Unnamed STMicro microcontroller Host interface – Micro USB port Core Interfaces: I²C controller & peripheral modes SPI controller & peripheral modes RS485 controller & peripheral modes CAN Bus UART 2x PWM 2x ADC 2x DAC Debugging / programming interfaces – 7-pin JTAG/SWD unpopulated header Power Sources – 3V & 5V DC with limited current via 2-pin terminal blocks All interfaces are available simultaneously through […]

December 23, 2020 by Jean-Luc Aufranc (CNXSoft) - 9 Comments

Glasgow Interface Explorer is an iCE40 FPGA based hardware debugging tool (crowdfunding)

We’ve seen some pretty interesting boards for hardware hackers and reverse engineers in recent months with the likes of Ollie and Tigard USB debug boards that allow interfacing various hardware interfaces and/or flashing firmware to different types of target boards. Here’s another one: Glasgow Interface Explorer. Based on Lattice Semi iCE40 FPGA, the board is described as being “designed for hardware designers, reverse engineers, digital archivists, electronics hobbyists, and anyone else who wants to communicate with a wide selection of digital devices with minimum hassle”. Glasgow Interface Explorer specifications: FPGA – Lattice Semiconductor iCE40HX8K FPGA USB – 1x USB-C port connected to FX2 high-speed USB interface capable of 480 Mbps throughput I/O headers 2x 8-channel I/O banks with 16 highly flexible I/O Each I/O bank comes with A dedicated programmable linear voltage regulator, configurable from 1.8 V to 5 V and providing up to 150 mA of power A dedicated […]

December 14, 2020December 14, 2020 by Jean-Luc Aufranc (CNXSoft) - 16 Comments

Bootterm – a developer-friendly serial terminal program

There are plenty of terminal programs to access the serial console from minicom or screen to Putty. But Willy Tarreau was not quite happy with those tools, so he decided to write his own: Bootterm. I was terribly fed up with the current state of serial terminals, which either don’t cope well with errors, or take ages to start, making you lose the first characters, or don’t support non-standard speeds etc. I finally wrote mine to address all that at once, plus support for automatic port detection (the last registered one is the good one by default), waiting for the port to be ready, and also support fixed or timed captures. And a few environment variables make it possible not to type any argument at all yet have the expected behavior. If that’s something of interest to you, you can check it there: https://github.com/wtarreau/bootterm It’s still young (no support for […]