terasic

Posted on by Jean-Luc Aufranc (CNXSoft) - No Comments on Parallax Propeller 1 P8X32A Open Source Multi-core MCU

Parallax Propeller 1 P8X32A Open Source Multi-core MCU

Lots of electronics devices are now powered by open source software such as Linux, open source hardware is not as wide-spread, but gaining tracking traction thanks to the like of Arduino, Beagleboard.org, Olimex, and many  projects on crowdfunding websites, and now we even start seeing some open source silicon. Existing open source processors include LEON3 (SparkV8) MCU, OpenRisc, and just very recently, LowRISC, based on 64-bit RISC-V instruction set architecture, has been announced with the backing of some of Raspberry Pi co-founders, Google ATAP, etc… and is currently being developed at the University of Cambridge, UK. Parallax Propeller 1 P8X32A is another MCU which has been open sourced last week.   Propeller 1 P8X32A had however been released in April 2006, and can be sourced as a 40-pin DIP chip for prototyping, and 44-pin QFP and QFN for production, and come with the following key features: Power Requirements: 3.3 VDC […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 3 Comments on Terasic’s Altera DE1-SoC Board Based on Cyclone V Dual Cortex A9 + FPGA SoC Sells for $150 Up

Terasic’s Altera DE1-SoC Board Based on Cyclone V Dual Cortex A9 + FPGA SoC Sells for $150 Up

A few months ago, Terasic unveiled its SoCKit powered by Altera Cyclone V dual Cortex A9 + FPGA. They’ve now announced a cheaper version will a less powerful Cyclone V SoC and lower specs (e.g. less RAM, only one sensor, etc…) that sells for as low as $150 for educational or academic purposes, and $199 for the rest of us. Altera DE1-SoC Board specifications: FPGA Device Cyclone V SoC 5CSEMA5F31 Device Dual-core ARM Cortex-A9 (HPS – Hard Processor System) 85K Programmable Logic Elements 4,450 Kbits embedded memory 6 Fractional PLLs 2 Hard Memory Controllers Configuration and Debug Quad Serial Configuration device – EPCQ256 on FPGA (EPCQ = Erasable Programmable Configurable Quad-SPI device) On-Board USB Blaster II (Normal type B USB connector) Memory Device 64MB (32Mx16) SDRAM on FPGA 1GB (2x256Mx16) DDR3 SDRAM on HPS 128MB QSPI Flash on HPS (QSPI Flash does not come pre-installed out of factory) Micro SD […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 2 Comments on $249 Terasic SoCKit Development Kit Features Altera Cyclone V SX Dual Core A9 + FPGA SoC

$249 Terasic SoCKit Development Kit Features Altera Cyclone V SX Dual Core A9 + FPGA SoC

There seems to be a lot a development going on around dual core A9 + FPGA SoCs from Xilinx or Altera these days, and Terasic has recently announced SoCKit, a development board based on Altera Cyclone V SX SoC with 2GB RAM (1GB for ARM cores, 1GB for FPGA), 110K logic elements, etc… Here are the specifications listed on Terasic website: FPGA Device – Cyclone V SX SoC—5CSXFC6D6F31C8NES: 110K LEs, 41509 ALMs 5140 M10K memory blocks 6 FPGA PLLs and 3 HPS PLLs 2 Hard Memory Controllers 3.125G Transceivers ARM-based hard processor system (HPS) @ 800 MHz, Dual-Core ARM Cortex-A9 MPCore Processor with 512 KB of shared L2 cache, 64 KB of scratch RAM,  Multiport SDRAM controller (DDR2, DDR3, LPDDR1, and LPDDR2), and  8-channel direct memory access (DMA) controller Configuration and Debug: Quad Serial Configuration device – EPCQ256 for FPGA On-Board USB Blaster II (micro USB type B connector) Memory […]

Exit mobile version
EmbeddedTS embedded systems design