We covered Gigadevice GD32V general-purpose microcontroller with a RISC-V “Bumblebee” core last week, and I was informed that Andes Technology had recently introduced AndesCore N22 RISC-V “Bumblebee” IP core capable of supporting either RV32IMAC or RV32EMAC instruction sets. A web search did not reveal any specific information about what “Bumblebee” RISC-V cores are exactly, or maybe it’s in reference that many can be coupled in parallel. But that’s just a small detail, let’s check out in some details what AndesCore N22 core has to offer. The RISC-V core is designed for entry-level MCUs found in IoT devices and wearables, and is capable of deeply embedded protocol processing for I/O control, storage, networking, AI and AR/VR. Highlights of AndesCore N22: AndeStar V5 (RV32IMAC) / V5e (RV32EMAC) Instruction Set Architecture (ISA), compliant to RISC-V technology plus Andes extensions architectured for performance and functionality enhancements 32-bit, 2-stage pipeline CPU architecture 16/32-bit mixable instruction […]
OrangeCrab is an Open Source Hardware, Feather-Compatible Lattice ECP5 FPGA Board
Lattice ECP5 FPGA powered OrangeCrab is the work of Greg Davill who designed the Adafruit Feather-compatible board in KiCAD, crowdsourced schematics/PCB checking and published his progress on Twitter, and published the files of the open source hardware board on Github. OrangeCrab board hardware specifications: FPGA – Lattice ECP5 25/45/85 variants System Memory – Up to 8Gbit DDR3 Memory (x16) Storage – 128Mbit QSPI FLASH Memory (Bitstream + User storage), 4-bit MicroSD socket USB – Micro USB connector, full-speed direct USB connection to FPGA Programming – 10-pin FPGA programming header Expansion – I/O’s broken out via 30 through holes: GPIO, SPI, I2C, Analog, … 7x diff pairs, 1x single ended only Misc – Reset Button, charge LED (Green: external power, Yellow: when charging, No color: when running off battery), 48MHz Oscillator Power Supply – 5V via USB port, battery header for LiPo battery + battery charger chip Dimensions – Adafruit Feather […]
RISC-V Bases and Extensions Explained
The other day we reported about GigaDevice GD32V general-purpose 32-bit RISC-V microcontroller, and one of the commenters asked whether it was rv32imac or rv32emac, and it turned out to be the former. In most cases, silicon vendors report whether they are using 32-bit, 64-bit, or the upcoming 128-bit RISC-V processors, but rarely go into details, so I asked why it mattered and got the following answer: RISC-V is a federation of ISA extensions — from the baseline rv{32|64|128}I, to an arbitrary combination of a handful of extensions. There are combinations which are dubbed ‘application-processor level’ (the G subset), but implementations can and often are not G-compliant, which is naturally the case with MCUs. Difference between rv32i and rv32e is 32-strong vs 16-strong GPR file, respectively. In the case of GD32VF103, rv32imac stands for a ‘full-size GPR file, integer mul/div, atomics, compressed (16bit) ISA’ set. What is missing from ‘application-processor level’ […]
GigaDevice Releases GD32V RISC-V MCU and Development Boards
A few years ago, we came across GigaDevice GD32 microcontroller compatible with STMicro STM32F103, but with a higher 108 MHz clock, and zero wait state internal flash. The MCU was also a drop-in replacement for the STMicro alternative since beside being software compatible, it was also pin-to-pin compatible. The company is now back with a new microcontroller, but it’s not Arm-based. Instead, GigaDevice GD32V is based on RISC-V open source architecture. GD32V General Purpose RISC-V MCU GigaDevice GD32V is a 32-bit RISC-V general-purpose MCU that targets industrial and consumer applications such as IoT, edge computing, artificial intelligence and “vertical industries”. The new GD32VF103 series RISC-V MCU family features 14 models with the following key specifications: Core – GD32VF103 32-bit rv32imac RISC-V “Bumblebee Core” @ 108 MHz Memory – 8KB to 32KB SRAM Storage – 16KB to 128KB flash Peripherals – USB OTG and CAN 2.0B I/O – 3.3V, 5V tolerant […]
Getting Started with Sipeed M1 based Maixduino Board & Grove AI HAT for Raspberry Pi
Last year we discovered Kendryte K210 processor with a RISC-V core and featuring AI accelerators for machine vision and machine hearing. Soon after, Sipeed M1 module was launched with the processor for aroud $10. Then this year we started to get more convenient development board featuring Sipeed M1 module such as Maixduino or Grove AI Hat. Seeed Studio sent me the last two boards for review. So I’ll start by showing the items I received, before showing how to get started with MicroPython and Arduino code. Note that I’ll be using Ubuntu 18.04, but development in Windows is also possible. Unboxing I received two packages with a Maixduino kit, and the other “Grove AI HAT for Edge Computing”. Grove AI HAT for Edge Computing Let’s start with the second. The board is a Raspberry Pi HAT with Sipeed M1 module, a 40-pin Raspberry Pi header, 6 grove connectors, as well […]
M5Stack M5StickV is a Tiny AI Camera for Maker Projects
I’ve just started to play with Maixduino board based on ESP32 WiSoC and Sipeed M1 module that enables AI tasks such as object detection thanks to built-in AI accelerators found in Kendryte K210 RISC-V processor and noticed references to M5Stack M5StickV in firmware file names. Somehow I never wrote about M5Stack, but the company provides modular ESP32 IoT development boards that can be stacked with various modules to easily and quickly build prototypes. M5StickV is one of those modules and is similar to Maixduino kit with camera and display, minus WiFi + Bluetooth connectivity, except that everything nicely packed into a cute module. M5StickV hardware specifications: SoC – Kendryte K210 dual-core 64-bit RISC-V processor @ 400MHz with dual independent double-precision FPU, 8MB on-chip SRAM, Neural Network Processor (KPU) @ 0.8Tops, Field-Programmable IO Array (FPIOA), and more Storage – 16MB flash, microSD card slot Display -1.14″ SPI display with 240×135 resolution […]
Embedded Linux Conference (ELC) Europe 2019 Schedule – October 28-30
I may have just written about Linaro Connect San Diego 2019 schedule, but there’s another interesting event that will also take place this fall: the Embedded Linux Conference Europe on October 28 -30, 2019 in Lyon, France. The full schedule was also published by the Linux Foundation a few days ago, so I’ll create a virtual schedule to see what interesting topics will be addressed during the 3-day event. Monday, October 28 11:30 – 12:05 – Debian and Yocto Project-Based Long-Term Maintenance Approaches for Embedded Products by Kazuhiro Hayashi, Toshiba & Jan Kiszka, Siemens AG In industrial products, 10+ years maintenance is required, including security fixes, reproducible builds, and continuous system updates. Selecting appropriate base systems and tools is necessary for efficient product development. Debian has been applied to industrial products because of its stability, long-term supports, and powerful tools for packages development. The CIP Project, which provides scalable and […]
HuskyLens AI Camera & Display Board is Powered by Kendryte RISC-V Processor (Crowdfunding)
A couple of years ago, I reviewed JeVois-A33 computer vision camera powered by Allwinner A33 quad-core Cortex-A7 processor running Linux. The tiny camera would implement easy-to-use software for machine vision with features such as object detection, eye tracking, QR code and ArUco marker detection, and so on. The camera could handle the tasks at hand, but since it relied on purely software computer vision, there were lag for some of the demo applications including 500ms for single object detection, and up to 3 seconds for YOLO test with multiple object types using deep learning algorithms. That’s a bit slow for robotics project, and software solutions usually consume more than hardware accelerated ones. Since then, we’ve started to see low-cost SoC and hardware with dedicated hardware AI accelerators, and one of those is Kendryte K210 dual-core RISC-V processor with a built-in KPU Convolutional Neural Network (CNN) hardware accelerator and APU audio […]