risc-v News - Page 33 of 54 - CNX Software

November 2, 2021November 9, 2021 by Jean-Luc Aufranc (CNXSoft) - 8 Comments

Linux 5.15 LTS release – Main Changes, Arm, RISC-V and MIPS architectures

Linus Torvalds released Linux 5.15, an LTS version, this past Sunday: It’s been calm, and I have no excuse to add an extra rc, so here we are, with v5.15 pushed out, and the merge window starting tomorrow. Which is going to be a bit inconvenient for me, since I also have some conference travel coming up. But it’s only a couple of days and I’ll have my laptop with me. Sometimes the release timing works out, and sometimes it doesn’t.. Anyway, the last week of 5.15 was mainly networking and gpu fixes, with some random sprinkling of other things (a few btrfs reverts, some kvm updates, minor other fixes here and there – a few architecture fixes, couple of tracing, small driver fixes etc). Full shortlog appended. This release may have started out with some -Werror pain, but it calmed down fairly quickly and on the whole 5.15 was […]

October 30, 2021December 23, 2021 by Jean-Luc Aufranc (CNXSoft) - 30 Comments

Build an open source-hardware Allwinner D1s RISC-V Linux SBC for under $10

We covered Allwinner D1s RISC-V processor with 64MB built-in RAM a few days ago, and we’ve just found out about Xassette-Asterisk, an open-source hardware board based on the processor that runs Linux (OpenWrt) and is said to cost less than $10 to make. This is significantly cheaper than the Allwinner D1 based Nezha RISC-V Linux SBC currently sold for a little over $100, a rather poor value. The cheaper board will not quite have the same applications with just 64 MB RAM and no HDMI, but it could be great for projects requiring a camera and/or a display, audio interfaces, plus some I/Os. Xassette-Asterisk specifications: SoC – Allwinner D1s single-core 64-bit RISC-V processor @ 1.008 GHz with 64MB DDR2 Storage – MicroSD card slot, 32 MBit SPI flash (W25Q32 – U2 on the board) Display I/F – 40-pin LCD connector, 6-pin touch panel interface, backlight power Camera I/F – 24-pin […]

October 25, 2021October 25, 2021 by Jean-Luc Aufranc (CNXSoft) - 49 Comments

Allwinner D1s/F133 RISC-V processor integrates 64MB DDR2

Allwinner D1s (aka F133) is a cost-down version of Allwinner D1 RISC-V processor introduced earlier this year together with a Linux capable development board, with the main difference being the integrated 64MB DDR2. Besides the built-in RAM, Allwinner D1s comes with many of the same features as D1 RISC-V SoC, but loses HDMI output and the HiFi 4 audio DSP, and Allwinner made some tweaks to the IOs with one less I2S audio interface, and general-purpose ADC. Allwinner D1s/F133 specifications: CPU – RISC core with 32 KB I-cache + 32 KB D-cache (CNXSoft: not specified, but probably the same Alibaba/T-Head Xuantie C906 RISC-V core as used in Allwinner D1) DSP – HiFi4 DSP 600MHz with 32 KB I-cache + 32 KB D-cache, 64 KB I-ram + 64 KB D-ram Memory – 64 MB DDR2 (SIP) Storage I/F – SD3.0, eMMC 5.0, SPI Nor/Nand Flash Video Engine Video decoding H.265 up […]

October 21, 2021October 26, 2021 by Jean-Luc Aufranc (CNXSoft) - 10 Comments

M5Stamp C3 RISC-V board supports WiFI 4, Bluetooth 5.0 Long Range and 2 Mbps bitrate

It was only last month that M5Stack launched the M5Stamp Pico module based on an ESP32-PICO-D4 SiP and heat-resistant plastic shell, but M5Stamp C3 board is already out with most of the same specifications and features but an ESP32-C3 RISC-V SoC replaces the ESP32 dual-core Xtensa processor. M5Stamp C3 offers WiFi 4 and Bluetooth 5.0 with high bitrate and long-range connectivity and comes with the same heat-resistant plastic shell, but the company also highlights the RSA-3072-based secure boot and the AES-128-XTS-based flash encryption as a more secure way to address Bluetooth security concerns. M5Stamp C3 specifications: WiSoC – ESP32-C3FH4 32-bit single-core RISC-V processor @ up to 160 MHz, with 384KB ROM, 400KB SRAM, 8KB RTC SRAM, 4MB embedded flash, WiFI and Bluetooth Connectivity 2.4 GHz WiFi 4, 20 MHz and 40 MHz bandwidth, IEEE 802.11 b/g/n protocol, up to 150 Mbps Bluetooth 5, Bluetooth mesh, with supports for 125 Kbps, […]

October 20, 2021October 21, 2021 by Jean-Luc Aufranc (CNXSoft) - 7 Comments

Alibaba open sources four RISC-V cores: XuanTie E902, E906, C906 and C910

Alibaba introduces a range of RISC-V processors in the last few years with the Xuantie family ranging from the E902 micro-controller class core to the C910 core for servers in data centers. This also includes the XuanTie C906 core found in the Allwinner D1 single-core RISC-V processor. While RISC-V is an open standard and there’s a fair share of open-source RISC-V cores available, many commercial RISC-V cores are closed source, but Zhang Jianfeng, President of Alibaba Cloud Intelligence speaking at the 2021 Apsara Conference, announced that T-Head had open-sourced four RISC-V-based Xuantie series processor cores, namely Xuantie E902, E906, C906, and C910, as well as related software and tools. Those are not empty words as we can find the RTL for the four cores released on T-Head Semiconductor’s Github account with the first commits having taken place yesterday. Each repository contains the code and instructions to get started, all under […]

October 18, 2021October 18, 2021 by Jean-Luc Aufranc (CNXSoft) - 11 Comments

HarmonyOS development board shows up for $11

Last year, we noted the Hisilicon Hi3861 based HiSpark WiFi IoT development board with supports LiteOS and HarmonyOS that was available in China for just under $10, or as part of a devkit with baseboard and modules for around $60. Although not very practical, buying from Taobao was possible, but there’s now what appears to be a new revision of the Hi3861V100 based HarmonyOS development board in a wider form factor on Banggood for $10.99. Hi3861 development board specifications: MCU – Hisilicon Hi3861V100 32-bit RISC-V microcontroller @ up to 160 MHz with 352 KB SRAM and 288 KB ROM, 2 MB flash memory, and WiFI 4 connectivity; QFN-32 5x5mm package WiFi 802.11b/g/n standard up to 72.2 Mbps @ HT20 2.4 GHz frequency band (ch1-ch14). Station (STA) and access point (AP) modes with up to 6 clients for the latter WiFi mesh with up to 256 nodes Security – WPA, WPA2 […]

October 18, 2021 by Jean-Luc Aufranc (CNXSoft) - 3 Comments

OpenBSD 7.0 adds 64-bit RISC-V, improves Apple Arm silicon support

OpenBSD 7.0, the 51st release of the UNIX-like operating system, was outed on October 14, 2021, with the introduction of 64-bit RISC-V support for HiFive Unmatched and PolarFire SoC Icicle Kit boards, as well as further improvements to ARM64 targets, notably for Apple Silicon Macs, although it’s not quite ready for general use yet. You’ll find the complete list of new features and updates on the OpenBSD website, but here are some of the highlights: New platforms – OpenBSD 7.0 add 64-bit RISC-V support Extended platforms arm64 Improvements to Apple Silicon Macs support USB 3, NVMe storage, GPIO driver, power management, etc… Enabled LEDs for the LAN7800 chip as found on the Raspberry Pi 3 Model B+. Added Type-C PHY controller found on the Rockchip RK3399. Implemented multicast support to Marvell ARMADA chips Various other changes to mips64, amd64, armv7, powerpc64 Kernel improvements Enabled dynamic tracker (dt) for GENERIC kernels […]

October 2, 2021April 5, 2022 by Jean-Luc Aufranc (CNXSoft) - 22 Comments

Getting Started with the Yocto Linux BSP for Polarfire SoC FPGA Icicle Kit

Getting Started Guide PolarFire SoC FPGA Icicle Kit

Last month I received Microchip PolarFire SoC FPGA Icicle development kit that features PolarFire SoC FPGA with a Penta–core 64-bit RISC-V CPU subsystem and an FPGA with 254K LE, and booted it into the pre-installed Linux operating systems based on OpenEmbedded. Today, I’ll show how to get started with the Yocto BSP and run the EEMBC CoreMark benchmark, and I’ll check out the FPGA with Libero SoC Design Suite in a couple of weeks. Operating Systems supported by PolarFire SoC FPGA My initial idea was to focus this part of the review on Linux on RISC-V status, checking some system information, running some benchmarks (e.g. SBC-Bench), compiling the Linux kernel, and installing services like a LEMP stack (Linux, Nginx (pronounced Engine-X), MySQL, PHP) which could be used for WordPress hosting for instance. But then I looked at the operating systems supported with Microchip PolarFire SoC FPGA. There’s a Yocto Linux […]