risc-v News - Page 10 of 52 - CNX Software

January 24, 2024January 23, 2024 by Jean-Luc Aufranc (CNXSoft) - 3 Comments

FOSDEM 2024 schedule – Open-source embedded, mobile, IoT, robotics, RISC-V, etc..

FOSDEM – which stands for Free and Open Source Software Developers’ European Meeting – is a free-to-participate event where thousands of developers meet in Brussels on the first week-end of February to discuss open-source software & hardware projects. FOSDEM 2024 will take place on February 3-4 with 880 speakers, 818 events, and 66 tracks. Although I won’t attend, I’ve created a virtual schedule like every year with sessions most relevant to the topics covered on CNX Software from the “Embedded, Mobile and Automotive” and “Open Hardware and CAD/CAM” devrooms, but also other devrooms including “FOSS Mobile Devices”, “ Energy: Reimagining this Ecosystem through Open Source”, “RISC-V”, and others. FOSDEM Day 1 – Saturday, February 3, 2024 10:30 – 10:55 – Screen Sharing on Raspberry Pi 5 Using VNC in Weston and Wayland with the Yocto Project and OpenEmbedded by Leon Anavi In 2023, embedded Linux developers received eagerly awaited news: […]

January 20, 2024January 21, 2024 by Debashis Das - 14 Comments

This new ESP32-C6-based IoT development board supports solar battery charging

FireBeetle 2 ESP32 C6 IoT Development Board with Wi Fi 6, Bluetooth 5, Solar Powered

DFRobot’s FireBeetle 2 ESP32-C6 is an IoT Development Board with 802.11ax (now called Wi-Fi 6), Bluetooth 5, Zigbee 3.0, Thread 1.3, and flexible power options including USB Type-C, 5V DC, and a CN3165 Lithium Ion battery charger for solar-powered systems. This isn’t the first solar-based board we’ve covered. We’ve also explored boards like Conexio Stratus, Wisblock Kit 2, and RAK8211-NB iTracker along with other solar-powered devices such as solar-powered laptops, solar-powered headphones, and even a solar-based power supply. FireBeetle 2 ESP32-C6 IoT Development Board Specifications: Processor – ESP32-C6 RISC-V single-core, 160 MHz Memory SRAM – 512KB ROM – 320KB Flash – 4MB RTC SRAM – 16KB USB – USB 2.0 CDC Wi-Fi Protocols – IEEE 802.11b/g/n, IEEE 802.11ax (20 MHz-only non-AP mode) Bandwidth – Supports 20 MHz and 40 MHz at 2.4 GHz Modes – Station, SoftAP, SoftAP+Station Frequency – 2.4GHz Frame Aggregation – TX/RX A-MPDU, TX/RX A-MSDU Bluetooth Protocol […]

January 14, 2024January 14, 2024 by Jean-Luc Aufranc (CNXSoft) - 2 Comments

How I “fixed” the display on Lichee Console 4A terminal

When I wrote a hands-on post about Lichee Console 4A RISC-V development terminal I noted the display would sometimes have strange effects or simply go black. I’ve now fixed the issue, and I was just probably unlucky since the issue must be rare, but I’ll still document it in case somebody encounters a similar problem and for fun! First, the video below shows what I would see on my terminal after using it for a few minutes. Since then, the display has gone completely dark, and all I see is the backlight, but I can still access the device through an SSH terminal. It looks like a bad connection issue, but I still contacted Sipeed and they told me it must have been the display connector. So I turned off the device and reopened the enclosure to remove and reinsert the cable for the display as shown in the photo […]

January 11, 2024 by Jean-Luc Aufranc (CNXSoft) - 2 Comments

Spacetouch SPV60 AI audio processor features a 400 MHz Andes D25F RISC-V core

Spacetouch SPV60 is a RISC-V AI audio processor with an Andes D25F 32-bit RISC-V CPU IP core with P-extension (DSP/SIMD) that is also found in the Telink TLSR9 wireless audio microcontroller introduced in 2020. But the SPV60 is clocked at a higher 400 MHz frequency, adopts a CPU + NPU + uDSP heterogeneous multi-core architecture with a 100 GOPS AI accelerator and a micro DSP capable of handling 1024-point FFT and iFFT among other mathematical functions, and offers a range of peripherals interfaces such as USB 2.0, SPDIF, I2C, PDM for microphone arrays, and more. Spacetouch SPV60 specifications: CPU Andes D25F 32-bit RISC-V core with P extension (DSP/SIMD ISA) clocked at up to 400MHz 5-stage pipeline Hardware multiplication/division operations Single precision floating point accelerator 32KB I-Cache and 16KB D-Cache; 32KB L2 Cache Spacetouch-designed uDSP – Support for 1024-point FFT and IFFT, FIR, COS, SIN, SQRT, Arctan, LOG, and other functions […]

January 10, 2024February 6, 2024 by Jean-Luc Aufranc (CNXSoft) - 9 Comments

Lichee Console 4A portable RISC-V development terminal review – Part 1: Unboxing, teardown, and hands on

Sipeed has just sent me a “Lichee Console 4A portable RISC-V development terminal” for review. It’s a quad-core RISC-V mini laptop based on the Alibaba T-Head TH1520 processor with a 7-inch touchscreen display, and my model is equipped with a Lichee LM4A module fitted with 16GB RAM and 128GB eMMC flash. I’ll start the review of the RISC-V developer kit with an unboxing, a teardown, and a quick try with the preinstalled Debian 12 “Bookworm” image, before testing the latter in the second part of the review. The second part will take some time as we have about twenty reviews planned for now, four of which I’ll be taking care of myself… Lichee Console 4A unboxing I received the device in a package indicating I had been sent the 16GB+128GB model and reading “Lichee Console 4A portable RISC-V developer terminal” which makes it clear it’s based on RISC-V, is portable […]

January 10, 2024January 10, 2024 by Tomisin Olujinmi - 9 Comments

Espressif announces the ESP32-C61 WiFi 6 SoC with improved affordability and wireless connectivity

Espressif has announced the ESP32-C61 SoC, a new ESP32-Cx chip with improved wireless connectivity, and expanded memory options. The ESP32-C61 builds upon the foundation laid by previous ESP32-Cx chips, such as the ESP32-C2 and ESP-C3, and its specifications appear to be quite similar to the ESP32-C6 launched in early 2023, but this SoC also adds support for the BLE Mesh 1.1 protocol and Quad SPI PSRAM at a frequency of up to 120MHz. It supports WiFi 6 on two modes (802.11ax and 802.11b/g/n) and includes a Bluetooth 5 (LE) radio with support for long-range operation through advertisement extension and coded PHY. The TWT (Target Wake Time) feature is supported in 802.11ax mode to save power, as well as OFDMA (Uplink/Downlink) and MU-MIMO (Downlink) for a high-quality, low-latency connection between devices. ESP32-C61 specifications: CPU – Single-core, 32-bit RISC-V microcontroller that can be clocked up to 160MHz Memory: 320KB on-chip SRAM 256KB […]

January 8, 2024 by Jean-Luc Aufranc (CNXSoft) - No Comments

Linux 6.7 release – Main changes, Arm, RISC-V, and MIPS architectures

Linus Torvalds has just announced the release of Linux 6.7, following Linux 6.6 LTS a little over two months ago: So we had a little bit more going on last week compared to the holiday week before that, but certainly not enough to make me think we’d want to delay this any further. End result: 6.7 is (in number of commits: over 17k non-merge commits, with 1k+ merges) one of the largest kernel releases we’ve ever had, but the extra rc8 week was purely due to timing with the holidays, not about any difficulties with the larger release. The main changes this last week were a few DRM updates (mainly fixes for new hw enablement in this version – both amd and nouveau), some more bcachefs fixes (and bcachefs is obviously new to 6.7 and one of the reasons for the large number of commits), and then a few random […]

January 4, 2024January 3, 2024 by Jean-Luc Aufranc (CNXSoft) - 11 Comments

WCH RISC-V microcontrollers can now be programmed with the Arduino IDE

WCH has launched some interesting RISC-V microcontrollers in the last year or so, including the “10 cents” CH32V003 RISC-V microcontroller with 2KB SRAM and 16KB flash or the CH32V307with more resources (up to 64KB SRAM and 256KB flash) and additional peripherals. So far they were programmable in C language using MounRiver IDE or an open-source toolchain, but WCH has now announced Arduino support for many of those RISC-V microcontrollers which should enable more people to get involved. The core library for CH32duino works with OpenOCD through WCH-LINKE hardware to download the firmware and debug WCH chips and a riscv-none-embed-gcc toolchain that supports custom RISC-V instructions (half-word and byte compression instruction extensions and hardware stack push/pop functions) found in WCH RISC-V microcontroller. The following evaluation kits are currently supported with ADC, DAC, USART, GPIO, EXTI, SysTick, I2C, and SPI peripherals: CH32V003F4P EVT board CH32V203G8U EVT board CH32X035G8U EVT board CH32V103R8T6_BLACK EVT […]