Morse Micro MM8108 is a new WiFi HaLow (802.11ah) SoC with a throughput of up to 43.33 Mbps, and improved range and power efficiency compared to its predecessor the Morse Micro MM6108 introduced in 2022 and supporting up to 32.3 Mbps transfer rate. The new chip is also smaller at just 5x5mm in a BGA package instead of 6x6mm in a QFN48 package for the MM6108/MM6104, adds a USB 2.0 host interface besides SDIO 2.0 and SPI, as well as a MIPI RFFE (Radio Frequency Front-End) for integration and interoperability with multi-radio systems. Morse Micro MM8108 specifications: 32-bit RISC-V Host Applications Processor (HAP) Single-Chip IEEE802.11ah Wi-Fi HaLow transceiver for low-power, long-reach IoT applications Worldwide Sub-1 GHz frequency bands (850MHz to 950MHz) On-chip 26 dBm power amplifier with support for external FEM (Front End Module) option 1/2/4/8 MHz channel bandwidth for up to 43.3 Mbps data rate using 256-QAM modulation at […]
FOSDEM 2025 schedule – Embedded, Open Hardware, RISC-V, Edge AI, and more
FOSDEM 2025 will take place on February 1-2 with over 8000 developers meeting in Brussels to discuss open-source software & hardware projects. The free-to-attend (and participate) “Free and Open Source Software Developers’ European Meeting” grows every year, and in 2025 there will be 968 speakers, 930 events, and 74 tracks. Like every year since FOSDEM 2015 which had (only) 551 events, I’ll create a virtual schedule with sessions most relevant to the topics covered on CNX Software from the “Embedded, Mobile and Automotive” and “Open Hardware and CAD/CAM” devrooms, but also other devrooms including “RISC-V”, “FOSS Mobile Devices”, “Low-level AI Engineering and Hacking”, among others. FOSDEM 2025 Day 1 – Saturday 1 10:30 – 11:10 – RISC-V Hardware – Where are we? by Emil Renner Berthing I’ll talk about the current landscape of available RISC-V hardware powerful enough to run Linux and hopefully give a better overview of what to […]
CNX Software’s 2024 Year in review, website statistics, and what to expect in 2025
That’s it! 2024 is almost over, and it’s time to reflect on what happened during the year. So I’ll look at the highlights of 2024, share some CNX Software website traffic statistics, and speculate on what may be ahead of us in 2025. Looking back at 2024 Raspberry Pi was super active this year with 22 product launches that included boards and modules like the Raspberry Pi 5 with 2GB RAM, Raspberry Pi Pico 2 and Pico 2 W, Raspberry Pi CM5, expansion modules like the Raspberry Pi AI camera, AI HAT+, and M.2 HAT+, new accessories such as the Raspberry Pi Touch Display 2 and the Raspberry Pi Monitor, and the new Raspberry Pi 500 keyboard PC among others. As usual, there was also plenty of announcement of accessories from third parties, and some boards with the new Raspberry Pi RP2350 Arm/RISC-V microcontroller. There weren’t any ground-breaking Arm processors […]
Sonata v1.0 RISC-V platform combines AMD Artix-7 FPGA and Raspberry Pi RP2040 MCU, features CHERIoT technology for secure embedded systems
lowRISC has released Sonata v1.0, a stable platform developed under the Sunburst project. Designed for embedded systems engineers, Sonata supports CHERIoT technology, enabling features like compartmentalization and enhanced memory safety. It provides a reliable foundation for building secure embedded systems. CHERIoT is a security-focused technology built on lowRISC’s RISC-V Ibex core, based on CHERI research from the University of Cambridge and SRI International. It addresses memory safety issues like buffer overflows and use-after-free errors using CHERI’s capability-based architecture. The CHERIoT capability format includes permissions for memory access, object types for compartmentalization, and bounds to restrict accessible memory regions. These features enable scalable and efficient compartmentalization, making it suitable for securely running untrusted software in embedded systems. Sonata v1.0 leverages this architecture to isolate components like network stacks and kernels within the CHERIoT RTOS. The lowRISC Sonata v1.0 specifications: FPGA – AMD Xilinx Artix-7 (XC7A35T-1CSG324C) CPU – AMD MicroBlaze soft-core based on […]
Sipeed NanoKVM-PCIe is an inexpensive KVM over IP solution with optional WiFi 6 and PoE support
Sipeed NanoKVM-PCIe is a variation of the NanoKVM KVM-over-IP solution introduced last summer, but instead of being a tiny Cube with USB-C power, the new model can be powered through the PCIe slot from the host (as well as USB-C) and adds optional WiFi 6 and PoE functionality. While it’s not based on the LicheePi Nano SBC like the NanoKVM, it relies on the same SOPHGO SG2002 RISC-V/Arm/8051 SoC and offers many of the same ports in a different form factor including 10/100Mbps Ethernet, two USB-C ports one for HID, the other for power, a small OLED information display, and an HDMI input port supporting up to 1080p60. NanoKVM-PCIe specifications: SoC – SOPHGO SG2002 Main core – 1GHz 64-bit RISC-V C906 or Arm Cortex-A53 core (the latter is likely not used here) Minor core – 700MHz 64-bit RISC-V C906 core Low-power core – 25 to 300MHz 8051 MCU core VPU […]
Sipeed’s MaixCAM-Pro AI camera devkit adds 2.4-inch LCD, 1W speaker, PMOD interface on top of WiFi 6 and BLE 5.4
Sipeed has recently released the MaixCAM-Pro AI camera devkit built around the SOPHGO SG2002 RISC-V (and Arm, and 8051) SoC which also features a 1 TOPS NPU for AI tasks. The module includes a 2.4-inch color touchscreen and supports up to a 5MP camera module. Other features include WiFi 6, BLE 5.4, optional Ethernet, built-in audio capabilities, a PMOD interface, GPIOs, and more. Additionally, it features an IMU, RTC chip, and AXP2101 power management for enhanced performance. The module is designed for AI vision, IoT, multimedia, and real-time processing applications. Just a few months back, Sipeed introduced the MaixCAM AI camera devkit, which is also built around the SOPHGO SG2002 RISC-V SoC. The new module improves on the MaixCAM with a redesigned PCB, upgraded casing, and various new features including a 2.4-inch IPS touchscreen (640×480), a 1W speaker, expanded IO interfaces, a power button, and an illumination LED. It also […]
Allwinner A733 octa-core Cortex-A76/A55 AI SoC supports up to 16GB RAM for Android 15 tablets and laptops
Allwinner A733 is an octa-core Cortex-A76/A55 processor with an optional 3 TOPS NPU and support for up to 16GB RAM designed for Android 15 tablets and laptops such as the Teclast P50Ai with a 10.92-inch touchscreen display. With two Cortex-A76 cores, six Cortex-A75 cores, an Imagination BXM-4-64 MC1 GPU, and an NPU, the Allwinner A733 looks very similar to the Allwinner A736 we noted in a roadmap last year. But there’s no news about the A736, so maybe the name was dropped and the Allwinner A733 was launched instead. Allwinner A733 specifications: CPU Dual-core Arm Cortex-A76 @ up to 2.00 GHz Hexa-core Arm Cortex-A55 @ up to 1.79 GHz Single-core RISC-V E902 real-time core GPU – Imagination Technologies BXM-4-64 MC1 VPU 8Kp24 H.265/VP9/AVS2 decoding (no mention of AV1) 4Kp30 H.265/H.264 encoding AI accelerator – Optional 3 TOPS NPU Memory 192 KB SRAM + 512 KB shared SRAM 32-bit LPDDR4/LPDDR4x/LPDDR5 interface […]
MIPS P8700 out-of-order 64-bit RISC-V processor targets automotive applications
MIPS first unveiled the MIPS P8700 series IP along with the I8500 multiprocessor IP cores in 2022, and the company has now announced the general availability of the P8700 64-bit RISC-V core. Built for Advanced Driver Assistance Systems (ADAS), ML, and software-based automotive applications, the MIPS P8700 Multiprocessing System (MPS) scales up to 64 heterogeneous clusters of out-of-order, multi-threaded multi-core MIPS CPUs. P8700 series RISC-V processor’s RISC-V architecture The P8700 is MIPS’ first RISC-V IP. It implements the RISC-V RV64GCZba_Zbb instruction set architecture. It allows the MPS to execute atomic operations, single-precision, and double-precision floating-point operations and incorporates bit manipulation extensions, which streamline data processing tasks. This capability with compressed instructions through the RISC-V C extension (RVC) allows for out-of-order multi-threading. P8700 series’ out-of-order multi-threading and heterogeneous clustering Out-of-order multi-threading simply means that the MPS processes multiple instructions simultaneously without following an order. Hence, the MPS can process even co-dependent […]