risc-v

Posted on by Jean-Luc Aufranc (CNXSoft) - 2 Comments on OpenWrt 24.10 released with Linux 6.6, TLS 1.3 by default, and 1970 supported devices

OpenWrt 24.10 released with Linux 6.6, TLS 1.3 by default, and 1970 supported devices

OpenWrt 24.10

OpenWrt 24.10 open-source lightweight Linux operating system for routers has just been released. It’s been upgraded to Linux 6.6 from Linux 5.15 in OpenWrt 2023.05, supports TLS 1.3 by default, improves support for WiFi 6 (802.11ax), and adds initial support for WiFi 7 (802.11be). After over one year of work since the release of OpenWrt 23.05, OpenWrt 24.10 adds over 5400 commits, and the total number of supported devices is now close to 2,000 at 1,970. It’s also the first stable release supporting OpenWrt One, the router directly designed by OpenWrt developers in collaboration with Banana Pi. OpenWrt 24.10 highlights: TLS 1.3 support in default images with MbedTLS 3.6 Activate POSIX Access Control Lists and file system security attributes for all file systems on devices with big flash sizes. Needed by docker. Note this is not enabled for all targets with the small_flash feature flag, including ath79/tiny, bcm47xx/legacy, lantiq/ase, lantiq/xrx200_legacy, […]

Posted on by Jean-Luc Aufranc (CNXSoft) - No Comments on Ceva-Waves Links200 IP supports Bluetooth LE High Data Throughput (HDT) up to 7.5 Mbps, 802.15.4 for Zigbee, Thread and Matter

Ceva-Waves Links200 IP supports Bluetooth LE High Data Throughput (HDT) up to 7.5 Mbps, 802.15.4 for Zigbee, Thread and Matter

Ceva-Waves Links200 IP Bluetooth LE HDT

Ceva has recently unveiled the Ceva-Waves Links200 multi-protocol platform IP with support for Bluetooth LE High Data Throughput (HDT) technology up to 7.5 Mbps and IEEE 802.15.4 for Zigbee, Thread, and Matter designed for TSMC’s low-power 12nm process. Released in 2016, Bluetooth 5 upgraded Low Energy implementation with four times the range and twice the speed of Bluetooth 4.0 LE transmission which meant up to 2 Mbps over BLE, and even the latest Bluetooth 6.0 specification does not change that. There’s just a new LE 2M 2BT physical layer for Bluetooth Channel Sounding. So I was intrigued when the press release of the Links200 further read: Addressing the rising market demand for faster, more efficient Bluetooth connectivity, particularly for low-power audio and latency-sensitive IoT applications, the breakthrough High Data Throughput mode more than doubles the speed of traditional Bluetooth, delivering a data rate of up to 7.5 Mbps. For this […]

Posted on by Debashis Das - 6 Comments on NXP EdgeLock A30 Secure Authenticator chip enables battery authentication for compliance with EU regulation 2023/1542

NXP EdgeLock A30 Secure Authenticator chip enables battery authentication for compliance with EU regulation 2023/1542

NXP EdgeLock A30 secure authenticator

NXP recently launched the EdgeLock A30 Secure Authenticator chip, a Common Criteria EAL 6+ certified secure authentication designed for IoT devices, including battery authentication applications. It complies with the EU’s Batteries Regulation 2023/1542, which mandates the inclusion of a Digital Product Passport (DPP), by 2027 to ensure traceability, sustainability, and safety in battery manufacturing and recycling. Alasdair Ross, Senior Director, NFC IoT Security, NXP explains: Secure authentication helps to ensure brand protection, consumer safety, and product traceability, fostering trust and shielding devices from physical damage. Smaller than a grain of rice, the EdgeLock A30 is designed to fit into even the smallest of devices. It supports multiple authentication use cases, making it easier for developers to support a variety of devices and accessories with a single solution, including device to device, cloud to device, counterfeit protection, and storage or protection of device identity. To address these requirements NXP’s EdgeLock A30 […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 2 Comments on Linux 6.13 Release – Main changes, Arm, RISC-V, and MIPS architectures

Linux 6.13 Release – Main changes, Arm, RISC-V, and MIPS architectures

Linux 6.13 Changelog

Linus Torvalds has just announced the release of Linux 6.13 on the Linux Kernel Mailing List: So nothing horrible or unexpected happened last week, so I’ve tagged and pushed out the final 6.13 release. It’s mostly some final driver fixes (gpu and networking dominating – normal), with some doc updates too. And various little stuff all over. The shortlog is appended for people who want to see the details (and, as always, it’s just the shortlog for the last week, the full 6.13 log is obviously much too big). With this, the merge window for 6.14 will obviously open tomorrow. I already have two dozen pull requests pending – thank you, you know who you are. Linus Release about two months ago, Linux 6.12 – the new LTS version – brought us real-time “PREEMPT_RT” support that had always required out-of-tree patchsets until now, the completion of the EEVDF (Earliest Eligible […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 5 Comments on Imagination exits the RISC-V CPU market

Imagination exits the RISC-V CPU market

Imagination exists RISC V Market

Imagination Technologies has decided to exit the RISC-V CPU market to redirect its resources to the development of its GPU and AI products. This was reported by eeNews Europe following an interview with the company: Imagination exited its standalone line of CPUs to increase our investment in graphics, AI and compute at the edge which we believe is transformational for our business […]  We remain committed to the RISC-V ecosystem and believe this change to our business allows us to partner more easily with the wider ecosystem as providers of the GPU of choice for RISC-V The company announced its entry into RISC-V IP core in 2021 with the introduction of the Catapult 32-bit and 64-bit RISC-V CPU cores, followed by the 32-bit RTXM-2200 real-time core in 2022, and the cost-optimized APXM-6200 RISC-V core was introduced last year. But all those RISC-V CPU cores are gone and won’t be found […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 5 Comments on Siflower SF21H8898 is a quad-core 64-bit RISC-V SoC for industrial gateways, routers, and controllers

Siflower SF21H8898 is a quad-core 64-bit RISC-V SoC for industrial gateways, routers, and controllers

Siflower SF21H8898 system block diagram

Siflower SF21H8898 SoC features a quad-core 64-bit RISC-V processor clocked at up to 1.25 GHz and a network processing unit (NPU) for handling traffic and is designed for industrial-grade gateways, controllers, and routers. The chip supports up to 2GB DDR3, DDR3L, or DDR4 memory, offers QSGMII (quad GbE), SGMII/HSGMII (GbE/2.5GbE), and RGMII (GbE) networking interfaces, and USB 2.0, PCIE 2.0, SPI, UART, I2C, and PWM interfaces. Siflower SF21H8898 specifications: CPU – Quad-core 64-bit RISC-V processor at up to 1.25 GHz Cache 32KB L1 I-Cache and 32KB L1 D-Cache per core Shared 256 KB L2 cache Memory – Up to 2GB 16-bit DDR3/3L up to 2133Mbps or DDR4 up to 2666Mbps Storage – NAND and NOR SPI flash support Networking 1x QSGMII interface (Serdes 5Gbps rate) for 4x external Gigabit Ethernet PHYs 1x SGMII/HSGMII interface (Serdes1.25/3.125Gbps rate) supporting Gigabit and 2.5Gbps modes 1x RGMII interface for Gigabit Ethernet 1x MDIO interface […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 1 Comment on Morse Micro MM8108 WiFi HaLow SoC supports up to 43.33 Mbps transfer rate, improves range and power efficiency

Morse Micro MM8108 WiFi HaLow SoC supports up to 43.33 Mbps transfer rate, improves range and power efficiency

Morse Micro MM8108

Morse Micro MM8108 is a new WiFi HaLow (802.11ah) SoC with a throughput of up to 43.33 Mbps, and improved range and power efficiency compared to its predecessor the Morse Micro MM6108 introduced in 2022 and supporting up to 32.3 Mbps transfer rate. The new chip is also smaller at just 5x5mm in a BGA package instead of 6x6mm in a QFN48 package for the MM6108/MM6104, adds a USB 2.0 host interface besides SDIO 2.0 and SPI, as well as a MIPI RFFE (Radio Frequency Front-End) for integration and interoperability with multi-radio systems. Morse Micro MM8108 specifications: 32-bit RISC-V Host Applications Processor (HAP) Single-Chip IEEE802.11ah Wi-Fi HaLow transceiver for low-power, long-reach IoT applications Worldwide Sub-1 GHz frequency bands (850MHz to 950MHz) On-chip 26 dBm power amplifier with support for external FEM (Front End Module) option 1/2/4/8 MHz channel bandwidth for up to 43.3 Mbps data rate using 256-QAM modulation at […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 4 Comments on FOSDEM 2025 schedule – Embedded, Open Hardware, RISC-V, Edge AI, and more

FOSDEM 2025 schedule – Embedded, Open Hardware, RISC-V, Edge AI, and more

FOSDEM 2025 Schedule Embedded

FOSDEM 2025 will take place on February 1-2 with over 8000 developers meeting in Brussels to discuss open-source software & hardware projects. The free-to-attend (and participate) “Free and Open Source Software Developers’ European Meeting” grows every year, and in 2025 there will be 968 speakers, 930 events, and 74 tracks. Like every year since FOSDEM 2015 which had (only) 551 events, I’ll create a virtual schedule with sessions most relevant to the topics covered on CNX Software from the “Embedded, Mobile and Automotive” and “Open Hardware and CAD/CAM” devrooms, but also other devrooms including “RISC-V”, “FOSS Mobile Devices”, “Low-level AI Engineering and Hacking”, among others. FOSDEM 2025 Day 1 – Saturday 1 10:30 – 11:10 – RISC-V Hardware – Where are we? by Emil Renner Berthing I’ll talk about the current landscape of available RISC-V hardware powerful enough to run Linux and hopefully give a better overview of what to […]

EmbeddedTS embedded systems design