NXP IW612 Wi-Fi 6, Bluetooth 5.2, 802.15.4 tri-radio solution supports Matter

NXP IW612 block diagram

Matter, previously known as Project Chip, is a unified interface for Smart Home devices to improve interoperability between devices from different manufacturers and associated services like Google Assitant or Amazon Alexa. Matter can work over Thread, WiFi, Ethernet, BLE, etc… so it’s not limited by the physical layer. So far, we mostly heard about development related to Matter, and Espressif has published a series of posts about Matter to be for instance used by their upcoming ESP32-H2 wireless MCU, but I had not seen many other solutions, not commercial products. This is going to change in 2022, as Belkin announced it’s working on “redesigned smart plugs and lighting solutions” with support for Matter over Thread” that start selling this summer. Separately, NXP also announced the IW612 tri-radio solution with Matter support and dual-band WiFI 6, Bluetooth 5.2, and 802.15.4 radios. NXP IW612 IW612 key features and specifications: Dedicated, independent CPUs […]

NXP i.MX 93 processor combines Cortex-A55 cores with Ethos U65 microNPU

NXP i.MX 93 (935x/933x)

NXP has unveiled the i.MX 93 processor family comprised of i.MX 935x, 933x, 932x, and 931x parts at this time with up to two Cortex-A55 cores, one Arm Cortex-M33 real-time core, as well as an Ethos U65 microNPU for machine learning (ML). We wrote about i.MX 9 family back in March with NXP telling us it would include an Arm Ethos U-65 microNPU and EdgeLock secure enclave, be manufactured with a 16/12nm FinFET class process, and includes the “Energy Flex” architecture to optimize power consumption by turning on/off specific blocks in the processor. The NXP i.MX 93 is the first family leveraging those new features, and we know have some more details. NXP i.MX 93 processor specifications: CPU 1x or 2x Arm Cortex-A55 @ 1.7 GHz with 32KB I-cache, 32KB D-cache, 64KB L2 cache, 256KB L3 cache with ECC 1x Arm Cortex-M33 @ 250 MHz low power microcontroller with 256KB […]

GPU-less NXP i.MX 8XLite Cortex-A35/M4 SoC is aimed at IIoT & V2X applications

NXP i.MX 8XLite

NXP i.MX 8XLite SoC is a cost-optimized version of NXP i.MX 8X automotive processor with up to two Cortex-A35 cores, one Cortex-M4F real-time core, and in a GPU-less configuration since it lacks the Vivante GPU found in i.MX 8X family. The headless processor also comes with dedicated Hardware Security Modules (HSM) to enable telematics solutions, vehicle-to-everything (V2X) applications including vehicle-to-vehicle (V2V) and vehicle-to-infrastructure (V2I) solutions, road infrastructure connectivity, as well as IIoT applications such as industrial equipment and building automation. NXP i.MX 8XLite key features and specifications: Processor complex 1x or 2x Arm Cortex-A35 cores @ up to 1.2 GHz with 256KB L2 cache with ECC 1x Arm Cortex-M4F core for real-time processing Memory I/F – 16-bit DDR3L-1866 and LPDDR4-2400 with ECC protection Storage I/F 1x FlexSPI for fast boot from SPI NOR flash 2x SD 3.0 card interfaces 1x eMMC5.1/SD3.0 NAND (62-bit ECC support) Networking – 1x Gigabit Ethernet […]

NXP i.MX RT500 Cortex-M33 Crossover MCU integrates DSP, 2D GPU for wearables and IoT devices

MIMXRT595-EVK

NXP i.MX RT500 is the second Cortex-M33 Crossover MCU following the NXP i.MX RT600 Series announced in 2018, and optimized for low-power HMI applications such as wearables and Smart Home & IoT devices. NXP Crossover MCUs are typically clocked at 600 MHz or more, but NXP i.MX RT500 Cortex-M33 is limited to 200 MHz, and combined with 200 MHz Tensilica Fusion F1 DSP as well as a 2D GPU, and power optimizations that enable long battery life of up to 40 days on a charge for wearables like smartwatches. NXP i.MX RT500 key features and specifications: MCU Core – Cortex-M33 @ up to 200 MHz with Arm TrustZone, M33 built-in Memory Protection Unit (MPU), PowerQuad hardware accelerator for DSP functions, CASPER crypto coprocessor for asymmetric cryptographic algorithms DSP Core – Cadence Tensilica Fusion F1 DSP @ up to 200 MHz On-Chip Memory Up to 5 MB of system SRAM accessible […]

The first Arm SystemReady IR certified platforms – NXP i.MX 8M Mini EVK & Compulab IOT-GATE-IMX8 gateway

NXP EVK Arm SystemReady IR

A few months ago, we noted SolidRun HoneyComb LX2K became a certified Arm SystemReady ES platform. SystemReady is a certification program by Arm that ensures systems just work with generic operating systems like in the x86 world. When we looked at the details of the program in the article, we noted there were different categories including SystemReady ES for embedded servers and SystemReady IR for IoT Edge applications. The first SystemReady IR platform – NXP i.MX 8 Mini evaluation kit Arm has just announced the first SystemReady IR platform had just been certified. That device is the NXP i.MX 8M Mini EVK, and that means that anyone that uses the i.MX 8M family of devices with the associated Board Support Package (BSP) can build platforms that will pass the same certification process and boot compliant Linux distributions with minimal integration effort. We can see more details about the certifications on Arm developer’s website. NXP i.MX 8M Mini EVK achieved certification with NXP 2021 Q2 pre-release firmware, version LF […]

NXP’s Ultra-Wideband (UWB) evaluation kits work with Apple U1 chip

UWB evaluation kits

The Fira Consortium was established in 2019 to provide an Ultra Wide-Band (UWB) ecosystem for real-time centimeter accuracy indoor positioning with companies such as NXP Semiconductors and Samsung Electronics on board. More companies have joined since then including Apple which designed its own UWB chip – the Apple U1 – found in recent iPhone 11 & 12 smartphones, as well as Apple Watch Series 6 to enable “Nearby Interaction“. If you’d like to develop UWB-enabled IoT applications, NXP has announced two beta UWB evaluation kits – developed with partners – compatible with Apple U1:  Murata Type2BP EVK and MobileKnowledge’s UWB Kit Mobile Edition. Murata Type2BP EVK Specifications: Wireless chips/modules Murata’s Type2BP ultra-small UWB module based on NXP Trimension SR150 Arm Cortex-M chip for IoT devices. 802.15.4z compatible and supports 3D AoA (Angle-of-Arrival) for extra precision. NXP QN9090 Arm Cortex-M4 Bluetooth 5.0 LE SoC with 640 KB flash, 152 KB RAM, […]

NXP unveils i.MX 8ULP Cortex-A35/M33 secure processors with optional Azure Sphere certification

NXP i.MX 8ULP-CS (cloud secured)

NXP may have just unveiled plans for i.MX 9 processor family with Arm Ethos U65 microNPU, and advanced security using the company’s EdgeLock enclave, but NXP also introduced new members to its popular i.MX 8 series with i.MX 8ULP and i.MX 8ULP-CS (Cloud Secured) processors. Both processors come with a mix of Cortex-A35 application processor(s) and Cortex-M33 real-time core, as well as Energy Flex low-power architecture and EdgeLock secure enclave, but i.MX 8ULP-CS includes Microsoft Pluton for secure cloud connectivity and lacks 2D/3D graphics and the HiFi 4 audio DSP. NXP i.MX 8ULP and 8ULP-CS key features and specifications: CPU i.MX 8ULP – Up to two Arm Cortex-A35 @ 1.0 GHz and Arm Cortex-M33 @ 216 MHz, i.MX 8ULP-CS – One Arm Cortex-A35 @ 1.0 GHz and Arm Cortex-M33 @ 216 MHz GPU (i.MX 8ULP only) – 2D GPU, and 3D GPU with support for OpenGL ES 3.1, OpenCLTM, Vulkan […]

NXP i.MX 9 processors to integrate Arm Ethos U-65 microNPU, EdgeLock secure enclave

NXP i.MX 9 Smart Cities

NXP i.MX 6 and i.MX 8 processors are widely used in industrial boards and systems-on-module, and the company has now teased a new family with i.MX 9 processors integrating Arm Ethos-U65 1 TOPS microNPU, as well as the company’s EdgeLock secure enclave for increased security. The company did not provide that many technical details, so we still don’t know which CPU cores, GPU, and exact peripherals will be found in the processor. But we do know the i.MX 9 processors will be manufactured with a 16/12nm FinFET class of process technology optimized for low power, and features the “Energy Flex” architecture that combines “heterogeneous domain processing (independent applications processor and real-time domains with a separate low-power multi-media domain), design techniques, and process technology to maximize performance efficiency”. That means most blocks of the processor can be turned off for low power audio or CAN networking use cases, and other industrial […]

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