intel News - Page 17 of 44 - CNX Software

January 3, 2018January 3, 2018 by Jean-Luc Aufranc (CNXSoft) - 15 Comments

Intel Hardware Security Bug Fix to Hit Performance on Windows, Linux…

Many security bugs can be fixed without performance penalty , but according to reports Intel processors have a hardware bug – whose details have not been disclosed yet (embargo) – that seems to affect all operating systems including Windows, Linux, Mac OS, etc…, and the fix may lead to significant performance hits for some tasks. We know a bit more thanks to the Kernel Page Table Isolation (KPTI) patch for Linux that enables the fix/workaround with X86_BUG_CPU_INSECURE feature. The fix used to be called KAISER, and there’s an explanation on LWN about “hiding the kernel from user space” about the issue: On contemporary 64-bit systems, the shared address space does not constrain the amount of virtual memory that can be addressed as it used to, but there is another problem that is related to security. An important technique for hardening the system is kernel address-space layout randomization (KASLR), which randomizes […]

December 27, 2017December 27, 2017 by Jean-Luc Aufranc (CNXSoft) - 2 Comments

More Details about Goldmont Plus Microarchitecture (used in Gemini Lake Processors)

2017 was the year of systems based on Intel’s low power, low cost Apollo Lake processors, and provided Intel does not suddenly decide to cancel yet another product, they will be replaced by Gemini Lake processors in 2018. The former is based on Goldmont microarchitecture, while the latter relies on the updated Goldmont microarchitecture. Intel has now released a document entitled “Intel 64 and IA-32 Architectures Optimization Reference Manual” where you’ll find more gritty technical details about Goldmont Plus in chapter 16 “SOFTWARE OPTIMIZATION FOR GOLDMONT PLUS, GOLDMONT, AND SILVERMONT MICROARCHITECTURES”. The enhancements over Goldmont include: Widen previous generation Atom processor back-end pipeline to 4-wide allocation to 4-wide retire, while maintaining 3-wide fetch and decode pipeline. Enhanced branch prediction unit. Improved AES-NI instruction latency and throughput. 64KB shared second level pre-decode cache (16KB in Goldmont microarchitecture). Larger reservation station and ROB entries to support large out-of-order window. Wider integer execution […]

December 21, 2017December 21, 2017 by Jean-Luc Aufranc (CNXSoft) - 2 Comments

Ubuntu 17.10 May Corrupt the BIOS on Some Lenovo, Acer, Dell, and Other Laptops

Canonical has decided to temporarily remove the download link to Ubuntu 17.10 due leaving a notice reading: The download of Ubuntu 17.10 is currently discouraged due to an issue on certain Lenovo laptops. Once fixed this download will be enabled again. The issue that many user are reported being unable to save BIOS settings or boot with USB in several Lenovo Laptops with many topics about this issue on Lenovo Forums. The installed operating system still boots normally, so many affected people may not have even noticed. Based on the bug report it seems to be related to the enablement of intel-spi-* drivers (Intel Serial Flash drive) in the kernel (CONFIG_SPI_INTEL_SPI_PCI option), and this could also affect Ubuntu 16.04 with HWE kernels. The fix is to disable the driver in the kernel, and Canonical will soon release images. The downside of not using the driver are likely null or minimal, […]

December 19, 2017 by Jean-Luc Aufranc (CNXSoft) - 4 Comments

Intel Stratix 10 MX FPGA Integrates High Bandwidth Memory DRAM (HBM2)

Intel started sampling (Altera) Stratix 10 ARM + FPGA SoC in late 2016, and now the company has announced the availability the new Stratix 10 MX FPGA family wih High Bandwidth Memory DRAM (HBM2). The latter allow Stratix 10 MX FPGAs to offer up to 10 times the memory bandwidth when compared with standalone DDR memory solutions. The higher bandwidth will be useful for multi-function accelerators for high-performance computing (HPC), data centers, network functions virtualization (NFV), and broadcast applications. Intel / Altera Stratix 10 MX SoC key features and specifications: Processor – Quad-core ARM Cortex-A53 MP Core up to 1.5 GHz Logic Density Range – 1.092M LE to 2.073M LE Embedded Memory 3.5 to 8GB HBM2 high-bandwidth DRAM memory 45 Mbit to 90 Mbit eSRAM memory 86 Mbit to 134 Mbit M20K memory 6 Mbit to 11 Mbit MLAB memory Up to 7,920 18 x 19 Multipliers Up to 72 […]

December 14, 2017June 18, 2018 by Jean-Luc Aufranc (CNXSoft) - 8 Comments

Holo P2P Distributed Hosting is Powered by Holochain Technology, Leverages Holo Fuel Cryptocurrency (Crowdfunding)

The Internet is now mostly centralized, for example most people search with Google, and Facebook dominates the social media space in many countries. That also means access to content can easily be blocked by governments, and many companies will use your personal data to their benefits. Holo network promises to “take back the Internet” thanks to a P2P distributed web hosting system, where people hosts app from developers in their HoloPort devices, and get paid for hosting crypto apps in Holo Fuel cryptocurrency that can in turn be used to pay for processing power and/or storage on the network, or converted into other cryptocurrencies like Bitcoin, or fiat money (Dollars, Euros…). It’s like a new Internet that uses the current “pipes” (i.e. you’d still need Internet through your ISP), but all content would have to be created from the ground up. It basically aims to replace datacenters, websites, and app […]

December 12, 2017December 12, 2017 by Jean-Luc Aufranc (CNXSoft) - 9 Comments

Six Intel Gemini Lake Processors Launched: Pentium Silver N5000 / J5005, and Celeron N4100, N4000, J4105 and J4005

Most of us have been expecting Intel Gemini Lake processors for a while, many of the features are already known, but there were some delays, and Intel has now only officially launched Intel Gemini Lake family with 6 processors. The models include two Pentium Silver quad core processor with N5000 for mobile, J5005 for desktop, and four Celeron dual/quad core processors with N4000 & N4100 for mobile, and Celeron J4005 & J4105 for desktop. All processors share the same 4MB cache which will help with performance improvement, and dual channel DDR4-2400, LPDDR4-2400 memory. Pentium processors come with Intel UHD Graphics 605 clocked up to 750/800 MHz, and Celeron processors are instead equipped with UHD Graphics 600 up to 650/750 MHz which the exactly frequency depending on model. The company also introduced Intel Pentium Silver and Intel Pentium Gold brand levels with the former on Gemini Lake architecture, and the latter […]

November 16, 2017 by Jean-Luc Aufranc (CNXSoft) - 7 Comments

LEAGOO T5c Smartphone Features Spreadtrum SC9853i Octa-core Intel Airmont SoC

Intel is supposed to have left the mobile and IoT markets, but a few month ago, I wrote about Spreadtrum SC9861G-IA, an octa-core Intel Airmont SoC designed for LTE smartphones. Airmont is the microarchitecture used in Intel’s Cherry Trail and Braswell SoC, so the Spreadtrum SoC is not based on a new microarchitecture, but it still shows Intel decided to still use the technology, just not with their name on the processor. The news was published in February, but so far I have not seen any phone based on the processor. Instead, a similarly specced SoC, namely Spreatrum SC9853i, is now found in LEAGOO T5c 5.5″ smartphone with 3GB RAM and 32GB flash. LEAGOO T5c smartphone specifications: SoC – Spreatrum SC9853i octa-core Intel 64-bit Airmont “Cherry Trail-T” processor @ up to 1.8 GHz (14-nm FinFET process) System Memory – 3GB RAM Storage – 32GB eMMC flash Display – 5.5″ SHARP […]

November 14, 2017November 19, 2017 by Jean-Luc Aufranc (CNXSoft) - 8 Comments

First OpenCL Encounters on Cortex-A72: Some Benchmarking

This is a guest post by blu about his experience with OpenCL on MacchiatoBin board with a quad core Cortex A72 processor and an Intel based MacBook. He previously contributed several technical articles such as How ARM Nerfed NEON Permute Instructions in ARMv8 or OpenGL ES development on Ubuntu Touch. Qualcomm launched their long-awaited server ARM chip the other day, and we started getting the first benchmarks. Incidentally, I too managed to get some OpenCL ray-tracing code running on an ARM Cortex-A72 machine that same day (thanks to pocl – an LLVM-based open-source OCL multi-platform implementation), so my benchmarking curiosity got me. The code in question is an OCL (half-finished) port of a graphics demo from 2014. Some remarks of what it does: For each frame: a single thread builds a sparse voxel octree from a dynamic voxel scene; the octree, along with current camera settings are passed to an […]