fpga News - Page 4 of 32 - CNX Software

February 19, 2024 by Tomisin Olujinmi - 1 Comment

Microchip announces the PolarFire SoC Discovery Kit, a low-cost devkit for Linux and real-time applications

The SoC Discovery Kit is the latest addition to Microchip’s list of development kits for the PolarFire series. The series is the first SoC FPGA family powered by a deterministic, coherent RISC-V CPU cluster. They provide low power consumption, thermal efficiency, and defense-grade security for smart, networked systems. They also support a deterministic L2 memory system for Linux and real-time applications. Microchip launched the Icicle Kit for the PolarFire SoC in 2020 and it was followed by the Video and Imaging Kit which was intended for mid-bandwidth imaging and video applications. Now, Microchip has announced the Discovery Kit which is billed as a low-cost alternative to the Icicle. The Discovery Kit retains the full range of features needed for testing concepts quickly, developing firmware applications, and programming/debugging user code. According to Microchip, the kit will bring “a low-cost RISC-V and FPGA development for learning and rapid innovation” to new and […]

February 13, 2024 by Tomisin Olujinmi - 5 Comments

NRFICE is a Bluetooth FPGA board in the Arduino UNO form factor (Crowdfunding)

The NRFICE FPGA is a Bluetooth FPGA board designed for edge computing and IoT applications. It is built upon a combination of the dual-core nRF5340 Bluetooth SoC and the Lattice ICE40UP5K FPGA. The ICE40 UltraPlus is a low-power, high-performance FPGA for edge computing and artificial intelligence projects and the nRF5340 is a Bluetooth 5.3 SoC that supports Bluetooth Low Energy (BLE), Bluetooth Mesh, Thread, NFC, and Zigbee. Through the Nordic nRF5340, NRFICE can load a project directly into the iCE40 FPGA, bypassing the usual extensive toolchain setup. This enables a new class of FPGA development, where bitstreams can be hosted in the cloud, selected by a user on their phone, and loaded wirelessly to the board. It features a built-in J-Link OB for easy debugging and programming without the need for emulator dongles and is similar to the previously covered Segger emPower evaluation board in this regard. This board supports […]

February 7, 2024 by Jean-Luc Aufranc (CNXSoft) - 1 Comment

Sapphire Edge+ VPR-4616-MB mini-ITX motherboard features “AMD Embedded+” architecture with Ryzen R2314 & Versal VE2302

Sapphire Edge+ VPR-4616-MB is a new mini-ITX motherboard on the “new” AMD Embedded+ “architecture” comprised of an AMD Ryzen Embedded R2314 processor and an AMD Versal AI Edge VE2302 adaptive SoC (also called FPGA SoC…). The motherboard supports up to 64GB ECC/non-ECC DDR4 memory for the CPU, 8GB of memory for the adaptive SoC, supports SATA and NVMe storage, dual video output, 2.5GbE networking, and offers a range of USB ports and M.2 sockets for expansion. AMD Embedded+ solutions target sensor fusion, AI inferencing, industrial networking, control, and visualization applications. SAPPHIRE Edge+ VPR-4616-MB specifications: AMD Embedded+ Architecture Adaptive SoC Subsystem Main IC – AMD Versal AI Edge VE2302 with dual Arm Cortex-A72 core processor @ up to 1.6 GHz, dual-core Arm Cortex-R5F, 23 TOPS AI engine, FPGA fabric, etc… System Memory – 2x 4GB LPDDR4 Storage 1Gbit OSPI NOR flash for local boot 64 Kbit EEPROM for Board-ID Expansion 160-pin […]

January 23, 2024January 22, 2024 by Jean-Luc Aufranc (CNXSoft) - No Comments

Cologne Chip releases an open-source integrated logic analyser (ILA) for GateMate FPGA chips

Integrated logic analyser ILA Cologne GateMate FPGA

Cologne Chip’s “Integrated logic analyzer” (ILA) project is an open-source Verilog implementation of a logic analyzer running on the company’s GameMate A1 FPGA and designed to capture internal signals. When we first covered the GameMate A1 FPGA we noted Cologne relies on the open-source Yosys framework coupled with a proprietary, but free-of-charge, place & route tool contrary to most other FPGA vendors that only offer closed-source proprietary development tools. The German company has now released the GateMate integrated logic analyzer project to help customers debug their FPGA designs. The project includes the digital circuit of the ILA designed in the hardware description language Verilog and a Python program (ILA Control Program) used to configure the configuration of the ILA from the design under test (DUT) and provide an interface with the user during the debugging process. The user will also need a GateMate FPGA toolchain and GTKWave open-source program to […]

January 15, 2024January 13, 2024 by Tomisin Olujinmi - 3 Comments

iW-RainboW-G58M is a compact module based on the Intel Agilex 5 SoC FPGA series

iW-RainboW-G58M Agilex 5 Dev Kit Top View

iWave Systems, an embedded systems solutions company based in India, has announced the launch of the iW-RainboW-G58M system-on-module (SoM). The module is based on Intel’s Agilex 5 SoC FPGA E-series family, a lineup of affordable, midrange FPGAs for intelligent edge and embedded applications. The Agilex 5 E-series is optimized to deliver better performance-per-watt than its predecessors at a smaller form factor. They feature an asymmetric applications processor system comprising two Arm Cortex-A76 cores and two Cortex-A55 cores for optimized performance and power efficiency. The Arm cores in the Agilex 5 SoC FGPA family are more powerful than the Cortex-A53 cores in the Intel Agilex 7 and 9 products, but those have faster high-speed interfaces and more logic elements. The Agilex 5 SoM is suitable for development in fields like wireless communications, video/broadcast, and industrial test and measurement sectors. The last iWave module we covered, the iW-RainboW-G55M, was based on a […]

January 3, 2024January 2, 2024 by Debashis Das - 5 Comments

Sipeed Tang Primer 25K board features 23,040 Logic Cells for FPGA prototyping and development

Sipeed Tang Primer 25K Features 23,040 Logic Cells for Efficient FPGA Prototyping and Development

Sipeed has recently introduced the Tang Primer 25K, an FPGA board powered by Gowin Semi GW5A-LV25MG121 chip. This board features 23,040 LUTs, USB Host capability, and an optional SDRAM module that unlocks vintage gaming. We have previously covered many FPGA boards like Sipeed Tang Mega 138K Pro, Fudan Micro JFM7K325T, ILYGO T-FPGA, and many other development boards by Sipeed including the Sipeed Tang Nano 20K with a Gowin GW2A FPGA. You can check those out if interested. The Tang Primer 25K development board is divided into the 25K SoM Board and the 25K Dock Board together they offer a comprehensive set of features: GW5A-LV25MG121 specifications: 23040 LUT4 23040 Registers (FF) 28x 18×18 Multipliers 6x PLLs Memory/Storage: 64Mbit NOR Flash 180K Distributed S-SRAM 1008K B-SRAM (bits) 56 Number of B-SRAM I/O Interfaces: 3x PMOD 40-pin header 2x buttons 8x I/O banks 75x General IO MIPI IO – 4lane Data USB Ports: […]

January 2, 2024January 2, 2024 by Tomisin Olujinmi - 2 Comments

Tillitis Tkey is an open-source RISC-V security key in a USB-C case

Tillitis’ TKey is a small, simple security key in a USB-C form factor, and described as a “new type of flexible USB security token” that is inspired by DICE (Device Identifier Composition Engine) and measured boot powered by a simple 32-bit RISC-V core, the PicoRV32, in a Lattice iCE40 UP5K FPGA. While we have covered hardware security modules in the past, this is the first security key we have seen that is based on an FPGA running a RISC-V core. The security token lacks persistent, onboard storage, unlike alternatives such as Yubikey Neo. Apps need to be loaded onto the key every time it is connected to a host device. It uses measured boot to generate a unique identifier for each application and is more secure than the alternatives since private keys are not stored on the device. Also, the hardware and software for the TKey are completely open-source for […]

December 29, 2023December 28, 2023 by Tomisin Olujinmi - No Comments

Aper-Oculus is an open-source camera development board for AMD Xilinx’s Kria SoM (Crowdfunding)

The Aper-Oculus board is an open-source hardware camera carrier board for the AMD Xilinx Kria system-on-modules aimed at high-speed computer vision applications. The carrier board is built around the Sony SLVS-EC (Scalable Low-Voltage Signaling with Embedded Clock), a high-speed interface standard that delivers high-resolution video output to the FPGA. It also features several connectivity options, including dual MIPI connectors, USB 3.0, DisplayPort, and SATA to accommodate the varying demands of AI and robotics projects. The Kria K24 and K26 SOMs are adaptive system-on-modules designed for edge and vision applications. These small modules are ruggedized and come with hardware acceleration enabled out-of-the-box. The Kria lineup also includes a series of starter kits, such as the KR260 Robotics Starter Kit, which are designed for early evaluation and development. Aper-Oculus specifications: Processor-Board Support – Compatible with AMD Xilinx Kria SOMs Video Interface – SLVS-EC for high-speed, high-quality video input Expansion – FMC connector […]