fpga News - Page 23 of 33 - CNX Software

September 18, 2017September 18, 2017 by Jean-Luc Aufranc (CNXSoft) - 13 Comments

LimeSDR Mini is a $135 Open Source Hardware, Full Duplex USB SDR Board (Crowdfunding)

LimeSDR open source hardware software defined radio was launched last year with the promise of integration with Ubuntu Snap Store allowing to easily download and install various radio implementations such as LTE, WiFi, Bluetooth, LoRa, etc… It was offered for $200 and up as part of a crowdfunding campaign, but Lime Microsystems is back on CrowdSupply with a cheaper and low end version aptly called LimeSDR Mini.LimeSDR mini specifications: FPGA – Intel Altera Max 10 (10M16SAU169C8G) with 16K Logic gates, 549 KB M9K memory, 2,368 KB user flash memory Storage – 4 MB flash memory for data; 2x128KB EEPROM for RF transceiver MCU firmware and data RF Lime Microsystems LMS7002M RF transceiver Tx & Rx SMA connectors Frequency range – 10 MHz to 3.5 GHz RF bandwidth – 30.72 Mhz Sample Rate – 30.72 MSps with 12-bit sample depth Power Output (CW): up to 10 dBm USB – 1x USB […]

August 27, 2017June 18, 2018 by Jean-Luc Aufranc (CNXSoft) - 4 Comments

Embedded Linux Conference & Open Source Summit Europe 2017 Schedule

The Embedded Linux Conference & IoT summit 2017 took place in the US earlier this year in February, but there will soon be a similar event with the Embedded Linux Conference *& Open Source Summit Europe 2017 to take up in Europe on October 23 – 25 in Prague, Czech Republic, and the Linux Foundation has just published the schedule. It’s always useful to find out what is being discussed during such events, even if you are not going to attend, so I went through the different sessions, and compose my own virtual schedule with some of the ones I find the most interesting. Monday, October 23 11:15 – 11:55 – An Introduction to SPI-NOR Subsystem – Vignesh Raghavendra, Texas Instruments India Modern day embedded systems have dedicated SPI controllers to support NOR flashes. They have many hardware level features to increase the ease and efficiency of accessing SPI NOR […]

July 24, 2017 by Jean-Luc Aufranc (CNXSoft) - 1 Comment

TinyFPGA is a Breakout Board for Lattice Semi MachXO2 FPGA

We’ve covered several low cost FPGA boards over the years, but if you want a platform with the bare minimum, you may be interested in tinyFPGA breakout board based on Lattice Semi MachXO2 FPGA board that comes with two flavors: A1 with MachXO2-256, and A2 with the more powerful MachXO2-1200 FPGA. TinyFPGA board specifications: FPGA A1 board – Lattice MachXO2-256 with 256 LUTs, 2 kbits distributed RAM A2 board – Lattice MachXO2-1200 with 1280 LUTs, 10 kbits distributed RAM, 64 kbits EBR SRAM, 64 kbits flash memory, and a PLL (See datasheet for MachXO2 family) Built-in flash configuration memory programmable via JTAG I/Os 18 user IOs (21 with JTAGEN) 1x SPI Hard-IP 2x I2C Hard-IPs A2 board only – 1x PLL Hard-IP Power Supply – 3.3V Dimensions – ~3.05 x 1.8 cm You’ll need a JTAG programmer for Lattice FPGA as well as Lattice Diamond software – available for Windows […]

July 20, 2017 by Jean-Luc Aufranc (CNXSoft) - 10 Comments

MYiR Introduces Z-Turn Lite Board Powered by Xilinx Zynq-7007S/Zynq-7010 SoC for $69 and Up

Xilinx launched a cost down version of their Zynq-7000 series with Zynq-7000S series SoC combining a single ARM Cortex A9 core with Artix FPGA fabric last year. We’ve already seen sub 100 Euros/Dollars board based on the new SoCs with ZynqBerry and MiniZed boards. MYiR Tech has now launched their own version, a cost-down version of their Z-Turn board, with Z-Turn Lite board featuring either the new cost-down Zynq-7007S or the “good old” Zynq-7010 SoC. Z-Turn Lite specifications: SoC Xilinx XC7Z007S-1CLG400C (Zynq-7007S) with a single ARM Cortex A9 core @ 667 MHz, Artix-7 FPGA fabric with with 23K logic cells, 14,400 LUTs, 66 DSP slices OR Xilinx XC7Z010-1CLG400C (Zynq-7010) with two ARM Cortex A9 cores @ 667 MHz, Artix-7 FPGA fabric with 28K logic cells, 17,600 LUTs, 80 DSP slices. System Memory – 512 MB DDR3 SDRAM (2 x 256MB, 32-bit) Storage – 4GB eMMC flash, 16MB QSPI flash, and […]

June 24, 2017 by Jean-Luc Aufranc (CNXSoft) - 4 Comments

IceZero Lattice iCE40 FPGA Board is Designed for Raspberry Pi Zero

Yesterday, we reported about Olimex’s open source hardware iCE40HX8K-EVB board with a Lattice iCE40 (HX8K) FPGA, and today, another iCE40 FPGA board, also open source hardware, appeared in my news feed with Trenz Electronic’s IceZero board specifically designed to be programmed using a Raspberry Pi Zero board. IceZero board specifications: FPGA – Lattice ICE40HX4K with 3520 logic gates, and 80 Kbit memory Storage – SPI Flash for FPGA self-configuration Misc – 3x User LEDs; User Clock: 100 MHz Expansion – 4x unpopulated PMOD Connectors; 40-pin Raspberry Pi female header Dimensions – 56 x 30.5mm (Raspberry Pi HAT Compatible) The board is supported by icoTC open source FPGA toolchain for Windows and Linux, which you can use in Raspberry Pi Zero (W), and other RPi board with a 40-pin header running Raspbian, as explained in that simple example in Github. Trenz electronic only shared part of the documentation, but you’ll find […]

June 23, 2017 by Jean-Luc Aufranc (CNXSoft) - No Comments

Olimex Introduces 40 Euros iCE40HX8K-EVB Board with Lattice ICE40 FPGA

Last year, Olimex launched their first FPGA board with iCE40HX1K-EVB. The board is very cheap at 22 Euros, but what you can do with it is limited since it only comes with 1280 logic cells. The company has now introduced an upgraded model called iCE40HX8K-EVB with 7680 logic cells, and more I/O headers. Olimex iCE40HX8K-EVB specifications: FPGA – Lattice Semi iCE40HX8K-CT256 FPGA with 7680 logic gates, 960 Logic Array Blocks, and 128 Kbit memory System Memory – 256Kx16 SRAM (512KB SRAM) Storage – 2MB serial flash Expansion 34-pin connector to access FPGA I/Os 4x 40 pin connectors for GPIOs Debugging / Programming – 10-pin “PGM” connector Misc – 2x user buttons, reset button, 2x user LEDs, power & programming status LEDs Power Supply – 5V via power jack Dimensions – 67×65 cm The board is open source hardware with the KiCAD schematics and PCB layout, BoM, and Gerber files available […]

June 14, 2017 by Jean-Luc Aufranc (CNXSoft) - 6 Comments

$89 MiniZed Development Board based on Xilinx Zynq Z-7007S SoC Includes WiFi, Bluetooth, Arduino Headers

Avnet has unveiled MiniZed development board – part of ZedBoard family – powered by a Xilinx Zynq Z-7007s SoC with an ARM Cortex A9 processor and FPGA fabric, supporting WiFi and Bluetooth connectivity, and equipped with Arduino and PMOD headers. MiniZed board (AES-MINIZED-7Z007-G) specifications: SoC – Xilinx Zynq-7007S single ARM Cortex A9 processor up to 677 MHz + FPGA with 23K logic cells, 1.8 Mb block RAM, 60 DSP slices System Memory – 512 MB DDR3L Storage – 8 GB eMMC flash, 128 Mbit QSPI flash Connectivity – Wi-Fi 802.11b/g/n and Bluetooth 4.1 plus EDR and BLE via Murata “Type 1DX” wireless module USB – 1x USB 2.0 host port Sensors – 3-axis accelerator and temperature sensor (LIS2DS12); Digital Microphone (MP34DT05) Expansion Interfaces: 2x Pmod compatible connectors with 16x GPIOs Arduino UNO R3 compatible header with 22x GPIOs Debugging – JTAG and serial console via micro USB port Misc – 2x […]

May 29, 2017 by Jean-Luc Aufranc (CNXSoft) - No Comments

Intel DLIA is a PCIe Card Powered by Aria 10 FPGA for Deep Learning Applications

Intel has just launched their DLIA (Deep Learning Inference Accelerator) PCIe card powered by Intel Aria 10 FPGA, aiming at accelerating CNN (convolutional neural network) workloads such as image recognition and more, and lowering power consumption. Some of Intel DLIA hardware specifications: FPGA – Intel (previously Altera) Aria 10 FPGA @ 275 MHz delivering up to 1.5 TFLOPS System Memory – 2 banks 4G 64-bit DDR4 PCIe – Gen3 x16 host interface; x8 electrical; x16 power & mechanical Form Factor – Full-length, full-height, single wide PCIe card Operating Temperature – 0 to 85 °C TDP – 50-75Watts hence the two cooling fans The card is supported in CentOS 7.2, and relies on Intel Caffe framework, Math Kernel library for Deep Neural Networks (MKL-DNN), and works with various network topologies (AlexNet, GoogleNet, CaffeNet, LeNet, VGG-16, SqueezeNet…). The FPGA is pre-programmed with Intel Deep Learning Accelerator IP (DLA IP). Intel DLIA can […]