Events such as the Embedded Linux Conference and Embedded Systems Conference take place in the US and Europe every year. There are plenty of talks and it’s certainly good for networking, but you need to travel to the event and the entrance fee to have access to all session costs several hundred dollars if you book early, and over one thousand dollars if you register close to the date of the event. Most ELC/ELCE videos usually end up on The Linux Foundation YouTube channel, but the Beningo Embedded Group and Embedded Related website decided to organize a similar conference happening online and simply called the “Embedded Online Conference“. The conference offers topics about embedded systems, DSP, machine learning and FPGA and will take place on May 20. There are currently 17 talks, but they are still calling for talks so more sessions may be added before the actual event. You’ll […]
ESP Open Source Research Platform Enables the Design of RISC-V & Sparc SoC’s with Accelerators
FOSDEM 2020 will take place next week, and there will be several interesting talks about open-source hardware and software development. One of those is entitled “Open ESP – The Heterogeneous Open-Source Platform for Developing RISC-V Systems” with an excerpt of the abstract reading: ESP is an open-source research platform for RISC-V systems-on-chip that integrates many hardware accelerators. ESP provides a vertically integrated design flow from software development and hardware integration to full-system prototyping on FPGA. For application developers, it offers domain-specific automated solutions to synthesize new accelerators for their software and map it onto the heterogeneous SoC architecture. For hardware engineers, it offers automated solutions to integrate their accelerator designs into the complete SoC. If we go to the official website, we can see ESP (Embedded Scalable Platform) actually supports both 32-bit Leon3 (Sparc) and 64-bit Ariane (RISC-V) cores, and various hardware accelerators from the platform or third parties. Highlights: […]
Lattice Introduces CrossLink-NX FPGA for Edge AI & Embedded Vision
Lattice CrossLink-NX FPGA Lattice Semiconductor has announced the first product associated with its Nexus Platform, the CrossLink-NX FPGA designed for embedded vision and Edge AI applications. There are two offerings at this time, the CrossLink-NX FPGA 17, and the CrossLink-NX FPGA 40. Recent Announcements The Nexus Platform was introduced at the beginning of December 2019, and now CrossLink-NX has been developed and is being manufactured. The first announcements of Lattice Nexus Platform and The CrossLink-NX Product Family came as the company’s moved to capture the embedded vision systems market. The Standout Features The low-power consumption, low soft error immunity, and 10Gbps MIPI are highlights of the CrossLink-NX FPGA. Other features include Instant On, with IO configured in 3 ms, and a total of 8 ms for the device. The Cross-Platform FPGAs The trends in technology are leading to devices that can cross function in a number of different tech environments. […]
Banana Pi BPI-F2S Industrial SBC Launched for $58 with Linux 4.19 based Debian or Fedora OS
Last month we covered Banana Pi BPI-F2S single board computer (SBC) for industrial, IoT, and smart audio application that was powered by the intriguing SunPlus SP7021 “Plus1” processor featuring four Cortex-A7 cores, one ARM9 ARM9 real-time core, and one 8051 I/O controller core, as well as up to 512MB built-in DDR3 RAM. At the time, the board was not available, and we had limited information about software support, except the company would provide a Yocto-based Linux distribution. The good news is that you can now buy Banana Pi BPI-F2S industrial SBC on Aliexpress for $58 and Taobao for 390 RMB, and the company released source code and OS images for the board. Here’s a reminder of Banana Pi BPI-F2S specifications: SoC – Sunplus SP7021 “Plus1” with a quad-core Cortex-A7 processor @ 1.0 GHz, one Arm A926 microprocessor, an 8051 core to handle I/Os, and 128MB or 512MB DDR3 DRAM. Storage […]
Trion T20 BGA256 FPGA Development Kit Supports “PulseRain Reindeer” RISC-V RV32IM soft CPU
A few months ago I wrote about FireAnt low-cost FPGA development board powered by Efinix Trion T8 FPGA, and it was the first time I personally heard about the company. Trion FPGA family range from the T4 with 3,888 logic elements up to the Trion T200 with 192,000 LE’s. A board more powerful than FireAnt, but not quite high-end, recently showed up on Digikey with Trion T20 BGA256 development kit going for $150. Trion T20 BGA256 Development Kit specifications: FPGA – Efinix Trion T20 FPGA with 19,728 LE’s, 1,044 Kbit embedded RAM, 36 18×18 multipliers, 7 PPL’s, up to 220 GPIO’s; 256-ball FBGA (13×13 mm) System Memory – 256 Mbit SDR SDRAM Storage – NOR flash USB – 1x Micro-USB port for programming Debug / Configuration – SPI and JTAG headers to facilitate configuration Expansion 3x I/O headers to connect to external devices LVDS TX header, LVDS RX & clock […]
OpenWiFi Open-Source Linux-compatible WiFi Stack Runs on FPGA Hardware
WiFi is omnipresent on most connected hardware, and when it works it’s great, but when there are issues oftentimes they can not be solved because the firmware is a closed-source binary. I understand companies do that either to protect their IP and/or make sure end-users do not break FCC compliance. OpenWiFi project aims to deliver a completely open-source SDR (Software Defined Radio) WiFi implementation compatible with Linux and running on FPGA hardware. OpenWiFi currently supported features: 802.11a/g; 802.11n MCS 0~7; 20MHz Mode tested: Ad-hoc; Station; AP DCF (CSMA/CA) low MAC layer in FPGA Configurable channel access priority parameters: duration of RTS/CTS, CTS-to-self SIFS/DIFS/xIFS/slot-time/CW/etc Time slicing based on MAC address Easy to change bandwidth and frequency: 2MHz for 802.11ah in sub-GHz 10MHz for 802.11p/vehicle in 5.9GHz The developers tested OpenWiFi on Xilinx ZC706 FPGA evaluation kit coupled Analog Devices fmcomms2/fmcomms4 RF board to form an access point, and connected it to […]
RISC-V based PolarFire SoC FPGA and Devkit Coming in Q3 2020
Microsemi unveiled PolarFire FPGA + RISC-V SoC about one year ago, but at the time, development was done on a $3,000 platform with SiFive U54 powered HiFive Unleashed board combined with an FPGA add-on board from Microsemi. I’ve now been informed that Microchip has announced its Linux-capable PolarFire FPGA+RISC-V SoC would start shipping in Q3 2020 at the RISC-V summit and that a development kit will be sold for a few hundred dollars. PolarFire SoC FPGA PolarFire SoC FPGA key features and specifications: Mid-Range FPGA optimized for Low Power High-speed serial connectivity with built-in multi-gigabit/multi-protocol transceivers from 250 Mbps to 12.7 Gbps Up to 461k logic elements consisting of a 4-input Look-Up Table (LUT) with a fracture-able D-type flip-flop Up to 31.6 Mb of RAM Power optimized transceivers Up to 1420 18 × 18 multiply-accumulate blocks with hardened pre-adders Integrated dual PCIe for up to ×4 Gen 2 Endpoint […]
Hacarus Embedded AI Computing Kit Leverages Sparse Modeling Technology
AI training often requires thousands of samples to become accurate, and it can be costly and time-consuming, for example, if you want to train a model to detect manufacturing defects you’d need to provide images with both defective samples and good samples. Japanese AI experts at Hacarus have been working on a solution called Sparse Modeling which requires about 50 samples or even less for training, and worked with Congatec to provides an embedded AI computing kit leveraging the technology. Sparse Modeling Technology Hacarus does not go into great detail but explains Sparse Modeling technology is using a data modeling approach that focuses on identifying unique characteristics, in a way that humans recognize friends and family without having to look at everything from feet to head. That means algorithms based on Sparse Modeling do not need as much data as traditional AI solutions, leading to much smaller AI footprint suitable […]