Lattice Introduces CrossLink-NX FPGA for Edge AI & Embedded Vision

Lattice CrossLink-NX FPGA Lattice Semiconductor has announced the first product associated with its Nexus Platform, the CrossLink-NX FPGA designed for embedded vision and Edge AI applications. There are two offerings at this time, the CrossLink-NX FPGA 17, and the CrossLink-NX FPGA 40. Recent Announcements The Nexus Platform was introduced at the beginning of December 2019, and now CrossLink-NX has been developed and is being manufactured. The first announcements of Lattice Nexus Platform and The CrossLink-NX  Product Family came as the company’s moved to capture the embedded vision systems market. The Standout Features The low-power consumption, low soft error immunity, and 10Gbps MIPI are highlights of the CrossLink-NX FPGA. Other features include Instant On, with IO configured in 3 ms, and a total of 8 ms for the device. The Cross-Platform FPGAs The trends in technology are leading to devices that can cross function in a number of different tech environments. […]

Banana Pi BPI-F2S Industrial SBC Launched for $58 with Linux 4.19 based Debian or Fedora OS

Banana Pi BPI-F2S

Last month we covered Banana Pi BPI-F2S single board computer (SBC) for industrial, IoT, and smart audio application that was powered by the intriguing SunPlus SP7021 “Plus1” processor featuring four Cortex-A7 cores, one ARM9 ARM9 real-time core, and one 8051 I/O controller core, as well as up to 512MB built-in DDR3 RAM. At the time, the board was not available, and we had limited information about software support, except the company would provide a Yocto-based Linux distribution. The good news is that you can now buy Banana Pi BPI-F2S industrial SBC on Aliexpress for $58 and Taobao for 390 RMB, and the company released source code and OS images for the board. Here’s a reminder of Banana Pi BPI-F2S specifications: SoC – Sunplus SP7021 “Plus1” with a quad-core Cortex-A7 processor @ 1.0 GHz, one Arm A926 microprocessor, an 8051 core to handle I/Os, and 128MB or 512MB DDR3 DRAM. Storage […]

Trion T20 BGA256 FPGA Development Kit Supports “PulseRain Reindeer” RISC-V RV32IM soft CPU

Trion T20 BGA256 Development Kit

A few months ago I wrote about FireAnt low-cost FPGA development board powered by Efinix Trion T8 FPGA, and it was the first time I personally heard about the company. Trion FPGA family range from the T4 with 3,888 logic elements up to the Trion T200 with 192,000 LE’s. A board more powerful than FireAnt, but not quite high-end, recently showed up on Digikey with Trion T20 BGA256 development kit going for $150. Trion T20 BGA256 Development Kit specifications: FPGA – Efinix Trion T20 FPGA with 19,728 LE’s, 1,044 Kbit embedded RAM, 36 18×18 multipliers, 7 PPL’s, up to 220 GPIO’s; 256-ball FBGA (13×13 mm) System Memory – 256 Mbit SDR SDRAM Storage – NOR flash USB – 1x Micro-USB port for programming Debug / Configuration – SPI and JTAG headers to facilitate configuration Expansion 3x I/O headers to connect to external devices LVDS TX header, LVDS RX & clock […]

OpenWiFi Open-Source Linux-compatible WiFi Stack Runs on FPGA Hardware

OpenWiFi

WiFi is omnipresent on most connected hardware, and when it works it’s great, but when there are issues oftentimes they can not be solved because the firmware is a closed-source binary. I understand companies do that either to protect their IP and/or make sure end-users do not break FCC compliance. OpenWiFi project aims to deliver a completely open-source SDR (Software Defined Radio) WiFi implementation compatible with Linux and running on FPGA hardware. OpenWiFi currently supported features: 802.11a/g; 802.11n MCS 0~7; 20MHz Mode tested: Ad-hoc; Station; AP DCF (CSMA/CA) low MAC layer in FPGA Configurable channel access priority parameters: duration of RTS/CTS, CTS-to-self SIFS/DIFS/xIFS/slot-time/CW/etc Time slicing based on MAC address Easy to change bandwidth and frequency: 2MHz for 802.11ah in sub-GHz 10MHz for 802.11p/vehicle in 5.9GHz The developers tested OpenWiFi on Xilinx ZC706 FPGA evaluation kit coupled Analog Devices fmcomms2/fmcomms4 RF board to form an access point, and connected it to […]

RISC-V based PolarFire SoC FPGA and Devkit Coming in Q3 2020

Microsemi unveiled PolarFire FPGA + RISC-V SoC about one year ago, but at the time, development was done on a $3,000 platform with SiFive U54 powered HiFive Unleashed board combined with an FPGA add-on board from Microsemi. I’ve now been informed that Microchip has announced its Linux-capable PolarFire FPGA+RISC-V SoC would start shipping in Q3 2020 at the RISC-V summit and that a development kit will be sold for a few hundred dollars. PolarFire SoC FPGA   PolarFire SoC FPGA key features and specifications: Mid-Range FPGA optimized for Low Power High-speed serial connectivity with built-in multi-gigabit/multi-protocol transceivers from 250 Mbps to 12.7 Gbps Up to 461k logic elements consisting of a 4-input Look-Up Table (LUT) with a fracture-able D-type flip-flop Up to 31.6 Mb of RAM Power optimized transceivers Up to 1420 18 × 18 multiply-accumulate blocks with hardened pre-adders Integrated dual PCIe for up to ×4 Gen 2 Endpoint […]

Hacarus Embedded AI Computing Kit Leverages Sparse Modeling Technology

Hacarus AI Computing Kit Sparse Modeling Technology

AI training often requires thousands of samples to become accurate, and it can be costly and time-consuming, for example, if you want to train a model to detect manufacturing defects you’d need to provide images with both defective samples and good samples. Japanese AI experts at Hacarus have been working on a solution called Sparse Modeling which requires about 50 samples or even less for training, and worked with Congatec to provides an embedded AI computing kit leveraging the technology. Sparse Modeling Technology Hacarus does not go into great detail but explains Sparse Modeling technology is using a data modeling approach that focuses on identifying unique characteristics, in a way that humans recognize friends and family without having to look at everything from feet to head. That means algorithms based on Sparse Modeling do not need as much data as traditional AI solutions, leading to much smaller AI footprint suitable […]

GOWIN GW1NRF FPGA Comes with Bluetooth 5.0 LE Radio & 32-bit ARC MCU

GW1NRF Bluetooth FPGA

I first heard about GOWIN Semiconductor last month when I found out about Sipeed Tang Nano FPGA board going for $5 and featuring GOWIN GW1N FPGA. The company has now announced what it claims is the first Bluetooth FPGA on the market with GW1NRF FPGA integrating a Bluetooth 5.0 LE radio and a 32-bit ARC microcontroller beside FPGA fabric. GOWIN GW1NRF-LV4N uSoC FPGA key features and specifications: FPGA Fabric – 4.6K LUTs, 180 Kb block SRAM, and 16 multipliers MCU – 32-bit ARC microcontroller with 48KB IRAM, 48KB DRAM 136KB block ROM, 128KB block OTG Security – AES-128, RNG, Key GEN Power Management – Wake-up timer, pin monitoring Wireless – Bluetooth LE (Low Energy) 5.0 Transceiver with PHY & MAC Power Supply  – 3V or 1.5 V with battery support via on-chip LDO regulator and step-up/step-down DCDC regular Power Consumption – 5nA power disable mode Package – 6x6mm QFN48 package […]

Digilent Offers 2 Zynq-Based Linux Development Boards Supporting SYZYGY Expansion

Digilent Announces SYZYGY high-speed SBCs Digilent has announced two new SBCs that are ultra-high-speed and built to be more modular than its other boards.  The company, which has a great deal of experience in Pmod lower speed FPGA standards has now entered the open-source, SYZYGY high-speed standards with its Eclypse Z7 and the Genesys ZU  development SBCs. Background on the Digilent Zybo FPGA SoC SBC We reported on the Zybo development board FPGA SoC from Digilent and that seems to have lead to the latest format for the Eclypse Z7. Zmod There is also a release planned for the new Zmod modules, built to work with both the Eclypse Z7 and the Genesys ZU  as SYZYGY compliant expansion modules. Opal Kelly and Zmod expansion The Zmods are Opal Kelly module standard, called SYZYGY, first seen in the Opal Kelly SYZYGY Brain-1 SBC. The standard was developed to jump the gap […]

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