fpga News - Page 13 of 32 - CNX Software

March 10, 2021 by Jean-Luc Aufranc (CNXSoft) - 2 Comments

Xilinx open sources Vitis HLS FPGA tool (Front-end only)

While there are some open-source programs for FPGA development such as Symbiflow or Yosys, FPGA vendors usually only provide closed-source programs for developers wanting to work on their chips. But Xilinx has recently made a move to fulfill its “commitment to supporting open-source initiatives for developers and researchers” with the release of the source code of Vitis HLS Front-End. What is Vitis HLS exactly? Before we look at the source code release, we may want to know what Vitis HLS does exactly. The company describes it as a high-level synthesis (HLS) tool that allows C, C++, and OpenCL functions to become hardwired onto the device logic fabric and RAM/DSP blocks. It implements hardware kernels in the Vitis application acceleration development flow, and to use C/C++ code for developing RTL IP for FPGA designs in the company’s Vivado Design Suite. Vitis HLS design flow goes as follows: Compile, simulate, and debug […]

February 15, 2021February 15, 2021 by Saumitra Jagdale - No Comments

CN0549 CBM development kit monitors assets through vibration analysis

CN0549 CBM Development Kit interfaced with SMA Connector

Condition Based Monitoring (CBM) has become quite popular in the manufacturing sector due to its advantages. It is a type of pre-analysis monitoring that includes the use of sensors to evaluate the status of an asset over time while it is in operation. Hence, the data collected is used to establish trends, predict failure, and measure the life of an asset. Analog Devices has launched CN0549, a condition-based monitoring development kit. The monitoring functionality signifies the consideration for hardware applications involving vibration. The applications include industrial as well as IoT devices. Hence, the CN0549 CBM development board combines the resources for a dynamic domain of users. Discussing further, condition-based monitoring (CBM) through vibration sensing requires the capturing of full-bandwidth data to ensure that all harmonics, aliasing, and other mechanical interactions are taken care of in both, the time and frequency domain. The data collection by using the sensors and data […]

February 6, 2021 by Jean-Luc Aufranc (CNXSoft) - 8 Comments

Qomu Cortex-M4F & FPGA USB board is programmable with Symbiflow open-source toolchain (Crowdfunding)

We’ve seen several tiny “omu” USB boards that are the size of a USB connector in the past, starting with Tomu based on Silabs EFM32 Arm-Cortex-M0+ MCU, then Fomu enabling Python programming and RISC-V softcore on a Lattice ICE40 FPGA, and finally Somu FIDO2 security key. There’s now the new Qomu board based on Quicklogic EOS S3 Cortex-M4F MCU with embedded FPGA. Just like its predecessor, the board almost completely fits in a USB connector except for the touch pads, and also happens to be programmable with Symbiflow that dubs itself as the “GCC of FPGAs”, as well as other open-source tools. Qomu specifications: SoC – QuickLogic EOS S3 Arm Cortex-M4F MCU @ up to 80 MHz with 512 KB memory, embedded FPGA with 2,400 effective logic cells and 64 Kbits of embedded RAM Storage – 16 Mbit flash Misc – Four capacitive touch pads, 1x RGB LED Power – […]

January 26, 2021January 26, 2021 by Jean-Luc Aufranc (CNXSoft) - 4 Comments

Arrow DECA Max 10 FPGA development board offered for $37 (Promo)

Arrow DECA evaluation board, featuring Altera’s MAX 10 FPGA and Enpirion power solutions, was launched in March 2015 and sold for around $169 at the time. Time has passed with Intel purchasing Altera FPGA business later that year, and the price of the board dropped to $65 as listed on Intel website. But now Arrow is offered the DECA FPGA for just $37, and you can also get fast free shipping if you’re a member of ArrowPerks loyalty program. Arrow DECA development board specifications: FPGA – Intel MAX 10 (10M50DAF484C6G) device with 50K logic elements, 1,638 Kbit block memory, 5,888 Kbits user flash memory, 4x PLLs System memory – 512MB DDR3 SDRAM (16-bit data bus) Storage – 64MB QSPI Flash, MicroSD card socket Video Output – HDMI v1.4 including 3D video support Audio – 24-bit audio CODEC with line-in, line-out jacks Camera – MIPI connect for camera module Connectivity – […]

January 15, 2021January 15, 2021 by Jean-Luc Aufranc (CNXSoft) - 3 Comments

USB2IO high-speed interface explorer tool combines Intel Cyclone 10 FPGA and STM32H7 MCU

In the second part of 2020, we’ve seen a fair amount of USB debugging tools for electronics designers and hardware hackers including the Glasgow Interface explorer with an ICE40 FPGA. But if you need even more flexibility or higher I/O speeds (up to 300 MHz), DAB Embedded USB2IO interface explorer should help thanks to the combination of an STMicro STM32H7 MCU and an Intel Cyclone 10 FPGA. USB2IO interface explorer hardware specifications: MCU – STMicro STM32H743 Arm Cortex-M7 @ 480MHz CPU clock An external 64MB QSPI flash for extra FPGA code storage; FPGA – Intel Cyclone 10LP (10CL040) with 40k logic elements, 1,134 Mbit embedded memory, 126 DSP blocks External memory – 32MB SDRAM for MCU and FPGA (64MB in total) Storage – 64MB QSPI for connected to MCU for FPGA code storage I/Os via 20-pin external header/connector 16 x GPIO mode (single-ended), 8x LVDS pair mode or a mix […]

December 23, 2020 by Jean-Luc Aufranc (CNXSoft) - 9 Comments

Glasgow Interface Explorer is an iCE40 FPGA based hardware debugging tool (crowdfunding)

We’ve seen some pretty interesting boards for hardware hackers and reverse engineers in recent months with the likes of Ollie and Tigard USB debug boards that allow interfacing various hardware interfaces and/or flashing firmware to different types of target boards. Here’s another one: Glasgow Interface Explorer. Based on Lattice Semi iCE40 FPGA, the board is described as being “designed for hardware designers, reverse engineers, digital archivists, electronics hobbyists, and anyone else who wants to communicate with a wide selection of digital devices with minimum hassle”. Glasgow Interface Explorer specifications: FPGA – Lattice Semiconductor iCE40HX8K FPGA USB – 1x USB-C port connected to FX2 high-speed USB interface capable of 480 Mbps throughput I/O headers 2x 8-channel I/O banks with 16 highly flexible I/O Each I/O bank comes with A dedicated programmable linear voltage regulator, configurable from 1.8 V to 5 V and providing up to 150 mA of power A dedicated […]

November 18, 2020November 18, 2020 by Jean-Luc Aufranc (CNXSoft) - 3 Comments

Intel unveils eASIC N5X Structured ASIC, and the Open FPGA Stack

Intel’s virtual FPGA Technology Day 2020 is taking place today, and the company made two announcements before the event. First, the company introduced the new Intel eASIC N5X structured eASIC family with an Intel FPGA compatible hard processor system to design to quickly create applications across 5G, artificial intelligence, cloud, and edge workloads. In addition, Intel also announced the Intel Open FPGA Stack (aka Intel OFS), a scalable, open-source (intel calls it “source-accessible”) hardware and software infrastructure available through git repositories design to ease the work of hardware, software, and application developers. Intel eASIC N5X eASIC N5X is the first structure ASIC from the company to integrate an Intel FPGA compatible Quad-core Armv8 hard processor system. The new chips will help customers bring custom solutions faster to market compared to traditional ASICs thanks to the FPGA fabric, and at a cheaper cost and with up to 50% lower core power […]

November 3, 2020December 15, 2020 by Jean-Luc Aufranc (CNXSoft) - 1 Comment

Precursor is a mobile, open hardware, dual FPGA development kit (Crowdfunding)

Precursor mobile open-source dual FPGA devkit

Sutajio Ko-usagi PTE LTD has launched some interesting hardware on Crowd Supply over the years include Novena open-source hardware Arm laptop, and Fomu FPGA USB board. The company is now back with another project: Precursor, a mobile, open-source hardware devkit powered by not one, but two FPGA with Xilinx Spartan 7-Series FPGA, plus a super-low-power Lattice iCE40 UP5K FPGA for deep-sleep system management. The device also comes with a display, battery, and keyboard that make it looks like older Palm or Blackberry phones. Precursor FPGA devkit specifications: FPGA Xilinx XC7S50 primary System on Chip (SoC) FPGA with -L1 speed grade for longer battery life; tested with 100 MHz VexRISC-V, RV32IMAC + MMU, 4k L1 I/D cache Lattice Semi iCE40UP5K secondary Embedded Controller (EC) FPGA for power, standby, and charging functions; tested with 18 MHz VexRISC-V, RV32I, no cache System Memory – 16MB external SRAM Storage – 128MB flash Display -536 […]