big.LITTLE processing is a new technology announced by ARM in 2011 that allows an SoC to feature low power cores (e.g. Cortex A7) together with high performance cores (e.g. Cortex A15) in order to optimize power consumption. I’ve previously detailed two big.LITTLE software implementation methods: In-kernel switcher which runs tasks on either Cortex A7 or Cortex A15 depending on the load, but both processors can not run simultaneously. Heterogeneous multiprocessing (now called Global Task Scheduling) that assigns tasks to relevant Cortex A7 or Cortex A15 cores, and if needed, allows all cores to run at the same time. Linaro has just provided a update for the big.LITTLE software implementation. There are currently only two SoCs that ship in products with Linaro b.L kernel support: ARM’s reference Test Chip 2 (TC2) tile for the Versatile Express development platform, configured as an SoC with 2 Cortex-A15 cores and 3 Cortex-A7 cores. Samsung-LSI’s […]
big.LITTLE Processing Update – In-Kernel Switcher vs Global Task Scheduling
