automotive

MIPS first unveiled the MIPS P8700 series IP along with the I8500 multiprocessor IP cores in 2022, and the company has now announced the general availability of the P8700 64-bit RISC-V core. Built for Advanced Driver Assistance Systems (ADAS), ML, and software-based automotive applications, the MIPS P8700 Multiprocessing System (MPS) scales up to 64 heterogeneous clusters of out-of-order, multi-threaded multi-core MIPS CPUs. P8700 series RISC-V processor’s RISC-V architecture The P8700 is MIPS’ first RISC-V IP. It implements the RISC-V RV64GCZba_Zbb instruction set architecture. It allows the MPS to execute atomic operations, single-precision, and double-precision floating-point operations and incorporates bit manipulation extensions, which streamline data processing tasks. This capability with compressed instructions through the RISC-V C extension (RVC) allows for out-of-order multi-threading.  P8700 series’ out-of-order multi-threading and heterogeneous clustering Out-of-order multi-threading simply means that the MPS processes multiple instructions simultaneously without following an order. Hence, the MPS can process even co-dependent […]