Arm introduced their first “Automotive Enhanced” processor with Cortex-A76AE last September. The processor targets autonomous driving applications, and comes with extra safety features such Dual Core Lock-Step (DCLS) running the same code on two different cores to continuously check the execution result is the same on both. The company has now unveiled a second AE core with Cortex-A65AE, which Arm claims is the first multithreaded Automotive Enhanced Cortex-A CPU technology to deliver the highest safety levels with Dual Core Lock-Step (DCLS). Arm Cortex-A65AE specifications: Architecture – Armv8-A (Harvard) Extensions – Armv8.1, Armv8.2, Cryptography, RAS, and Armv8.3 (LDAPR instructions only) ISA support – A64 Microarchitecture Out-of-order Pipeline Superscalar NEON/Floating Point Unit Optional Cryptography Unit Max number of CPUs in cluster – Eight Physical Addressing (PA) – 44-bit Dual Core Lock-Step Memory system and external interfaces L1 I-Cache / D-Cache – 16KB to 64KB L2 Cache – 64KB to 256KB L3 Cache […]
Arm Cortex-A65AE Targets Safety-Critical Automotive, Aviation, and Industrial Automation Applications
