Armv9 architecture was announced in Q1 2021, building upon Armv8 but adding blocks and instructions for artificial intelligence, security, and “specialized compute”, i.e. hardware accelerators or instructions optimized for specific tasks. The company has now introduced the first three Armv9 cores with Cortex-X2, Cortex-A710, and Cortex-A510 cores, providing updates to respectively Cortex-X1, Cortex-A78, and Cortex-A55 cores. The company calls those new cores “Arm Total Compute solutions”. Arm Cortex-X2 flagship core is the company’s most powerful CPU so far with 30% performance improvements over Cortex-X1 and will be found in premium smartphones and laptops. Arm Cortex-A710 “big” CPU core provides a 30% energy efficiency gain and 10% uplift in performance compared to Cortex-A78, while Arm Cortex-A510, high efficiency “LITTLE” Armv9 core delivers up to 35% performance improvements and over 3x uplift in ML performance compared to Cortex-A55 announced four years ago, or about the same performance as the “big” Cortex-A73 cores […]
Armv9 architecture to focus on AI, security, and “specialized compute”
Armv8 was announced in October 2011 as the first 64-bit architecture from Arm. while keeping compatibility with 32-bit Armv7 code. Since then we’ve seen plenty of Armv8 cores from the energy-efficient Cortex-A35 to the powerful Cortex-X1 core, as long as some custom cores from Arm partners. But Arm has now announced the first new architecture in nearly ten years with Armv9 which builds upon Armv8 but adds blocks for artificial intelligence, security, and “specialized compute” which are basically hardware accelerators or instructions optimized for specific tasks. Armv9 still supports Aarch32 and Aarch64 instructions, NEON, Crypto Extensions, Trustzone, etc…, and is more an evolution of Armv8 rather than a completely new architecture. Some of the new features brought about by Armv9-A include: Scalable Vector Extension v2 (SVE2) is a superset of the Armv8-A SVE found in some Arm supercomputer core with the addition of fixed-point arithmetic support, vector length in multiples […]