Current Qualcomm based Windows 10 laptops are mostly interesting for people wanting all-day battery life and/or being always connected over 4G LTE, as they are still pretty expensive, and performance somewhat underwhelming, although Snapdragon 8cx processor should change that. Chinese-based PiPo, known for their tablets, mini PCs and Arm Android laptops, is working on solving affordability of Arm Windows 10 laptop with their Snapdragon 850 2-in-1 laptop, heavily inspired by Huawei MateBook E 2019, and expected to sell for half the price or around $400. PiPo 2-in-1 laptop preliminary specifications: SoC – Qualcomm Snapdragon 850 octa-core Kryo 385 Arm cores clocked @ up to 2.96 GHz with Adreno 630 Visual Processing Subsystem, Hexagon 685 DSP Systmem Memory – 8GB RAM Storage – 256GB flash storage Display – 12.3″ IPS display with 3000×2000 resolution, 10-point touch Audio – 3.5mm audio jack, Connectivity – WiFi 5 802.11ac/b/g/n + 4G LTE Camera – […]
Arm Custom Instructions Coming to Armv8-M Embedded Processors
So far Arm defined all instructions for their cores with the benefit of code portability between solutions, so code compiled for an Arm Cortex-M33 based microcontroller would run on another without modifications (we’re obviously talking about code running directly on the core, not using specific peripherals here). But with RISC-V open-source architecture many have seen the benefit of custom instructions for specific tasks, at the risk of potential fragmentation. With Arm Techcon 2019 now taking place, Arm has just announced support for custom instructions for ARMv8-M embedded CPUs starting with Arm Cortex-M33 cores. The implementation of Arm Custom Instructions for specific embedded and IoT applications will start in H1 2020 at no additional cost to licensees and without risk of software fragmentation using NOCP exception if the instructions are not available. Arm futher explains: Arm Custom Instructions are enabled by modifications to the CPU that reserve encoding space for designers […]
ctxLink Open Hardware WiFi Debug Probe is based Black Magic Probe (Crowdfunding)
Last month, we wrote about Blip nRF52840 dev board that also included an STM32F103 MCU running the open source Black Magic Probe (BMP) firmware for debugging and programming. Based on the original Black Magic Probe hardware product page, BMP is a JTAG and SWD adapter used for programming and debugging ARM Cortex MCUs, and does not require intermediate programs such as OpenOCD or STLink server. Instead, you can run GNU Debugger (GDB) and select the virtual COM port offered by the debug board. The reason I’m bringing BMP again today, is because a new open source hardware wireless debugging probe for Cortex-M based on Black Magic Probe has been launched in the last few days. ctxLink key features and specifications: Microcontroller – STMicro STM32F401RE Arm Cortex -M4F MCU at up to 84 MHz Connectivity – 802.11b/g/n WiFi via Microchip WINC1500 module USB – 1x micro USB port for connection to […]
Linux 5.3 Release – Main Changes, Arm, MIPS & RISC-V Architectures
Linus Torvalds has just announced the release of Linux 5.3: So we’ve had a fairly quiet last week, but I think it was good that we ended up having that extra week and the final rc8. Even if the reason for that extra week was my travel schedule rather than any pending issues, we ended up having a few good fixes come in, including some for some bad btrfs behavior. Yeah, there’s some unnecessary noise in there too (like the speling fixes), but we also had several last-minute reverts for things that caused issues. One _particularly_ last-minute revert is the top-most commit (ignoring the version change itself) done just before the release, and while it’s very annoying, it’s perhaps also instructive. What’s instructive about it is that I reverted a commit that wasn’t actually buggy. In fact, it was doing exactly what it set out to do, and did it […]
How to Sandbox an arm64 GCC on aarch64 Hardware with armv7 Userspace
CNXSoft: Guest post by Blu about setting up arm64 toolchain on 64-bit Arm hardware running a 32-bit Arm (Armv7) rootfs. Life is short and industry progress is never fast enough in areas we care about. That’s an observation most of us are familiar with. One would think that by now most aarch64 desktops would be running arm64 environments, with multi-arch support when needed. Alas, as of late 2019, chromeOS on aarch64 is still shipping an aarch64 kernel and an armhf userspace. And despite the fine job by the good folks at chromebrew, an aarch64 chromeOS machine in dev mode ‒ an otherwise excellent road-warrior ride, is stuck with 32-bit armhf. Is that a problem, some may ask? Yes, it is ‒ aarch64 is the objectively better arm ISA outside of MCUs, from gen-purpose code to all kinds of ISA extensions, SIMD in particular. That shows in contemporary compiler support and […]
AndesCore N22 RISC-V Core Supports RV32IMAC or RV32EMAC Instruction Sets
We covered Gigadevice GD32V general-purpose microcontroller with a RISC-V “Bumblebee” core last week, and I was informed that Andes Technology had recently introduced AndesCore N22 RISC-V “Bumblebee” IP core capable of supporting either RV32IMAC or RV32EMAC instruction sets. A web search did not reveal any specific information about what “Bumblebee” RISC-V cores are exactly, or maybe it’s in reference that many can be coupled in parallel. But that’s just a small detail, let’s check out in some details what AndesCore N22 core has to offer. The RISC-V core is designed for entry-level MCUs found in IoT devices and wearables, and is capable of deeply embedded protocol processing for I/O control, storage, networking, AI and AR/VR. Highlights of AndesCore N22: AndeStar V5 (RV32IMAC) / V5e (RV32EMAC) Instruction Set Architecture (ISA), compliant to RISC-V technology plus Andes extensions architectured for performance and functionality enhancements 32-bit, 2-stage pipeline CPU architecture 16/32-bit mixable instruction […]
Linaro Connect San Diego 2019 Schedule – IoT, AI, Optimizations, Compilers and More
Linaro has recently released the full schedule of Linaro Connect San Diego 2019 that will take place on September 23-27. Even if you can’t attend, it’s always interested to check out the schedule to find out what interesting work is done on Arm Linux, Zephyr OS, and so on. So I’ve created my own virtual schedule with some of the most relevant and interesting sessions of the five-day event. Monday, September 23 14:00 – 14:25 – SAN19-101 Thermal Governors: How to pick the right one by Keerthy Jagadeesh, Software Engineer, Texas Instruments With higher Gigahertz and multiple cores packed in a SoC the need for thermal management for Arm based SoCs gets more and more critical. Thermal governors that define the policy for thermal management play a pivotal role in ensuring thermal safety of the device. Choosing the right one ensures the device performs optimally with in the thermal budget. […]
Samsung Galaxy Book S Snapdragon 8cx Laptop to Launch soon for $1,000
Qualcomm Snapdragon 8cx was announced as the first Snapdragon processor specifically designed for connected mobile PCs (aka laptops with cellular connectivity) last December. Earlier this year we got confirmation 8cx would support 5G connectivity as an option, and in May, we got news Lenovo Limitless 5G laptop was coming and got some benchmarks showing Snapdragon 8cx with performance similar to an Intel Core i5 Kaby Lake-R processor (15 Watt TDP) while offering much longer battery life. It’s Samsung turn to announce their Snapdragon 8cx laptop with Samsung Galaxy Book S that will be available this fall for $999 and up. Samsung Galaxy Book S specifications: SoC – Qualcomm Snapdragon 8cx Compute Platform with eight 64-bit Armv8 cores in two clusters: Kryo 495 Gold cores (Cortex-A76 class) @ 2.84 GHz + Kryo 495 cores (Cortex-A55 class) @ 1.8GHz ; 7nm process; 7W TDP System Memory – 8GB RAM (LPDDR4X) Storage – […]