arm

Posted on by Jean-Luc Aufranc (CNXSoft) - 3 Comments on MicroPython v1.24 release adds support for RP2350 and ESP32-C6 microcontrollers, various RISC-V improvements

MicroPython v1.24 release adds support for RP2350 and ESP32-C6 microcontrollers, various RISC-V improvements

Micropython v1.24 with ESP32-C6 and RP2350 support

MicroPython has become one of the most popular ways of programming microcontrollers, and the just-released MicroPython v1.24 adds support for the widely-used Raspberry Pi RP2350 and Espresif ESP32-C6 microcontrollers and a range of other changes. Those include improved RISC-V support with native code generation, an updated Zephyr v3.7.0 RTOS with threading support, unified TinyUSB bindings across ports, a portable UART IRQ API, and enhanced mpremote recursive copy. Damien George goes into more detail about the RISC-V improvements: … include an RV32IMC native code emitter, native NLR and GC register scanning implementations for 32- and 64-bit RISC-V, support for placing RV32IMC native code in .mpy files and also freezing it, and RISC-V semihosting support. Testing for RISC-V is done with the qemu and unix ports, and the support is utilised in the esp32 and rp2 ports. The Raspberry Pi RP2350 comes with both Arm Cortex-M33 and RISC-V cores, and the good […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 14 Comments on Upcoming Rockchip RK3688 Armv9.3 AIoT processor to feature a 16 TOPS NPU, UFS 4.0 interface

Upcoming Rockchip RK3688 Armv9.3 AIoT processor to feature a 16 TOPS NPU, UFS 4.0 interface

Rockchip RK3688 Armv9.3 processor

Rockchip has unveiled the RK3688 AIoT SoC with Armv9.3 Cortex-A7xx cores delivering up to 250K DMIPS (RK3588 delivers 93K DMIPS), a 1 TFLOPS GPU, and a 16 TOPS NPU. The new processor succeeds the Rockchip RK3588 octa-core Cortex-A76/A55 first announced in 2019, and also features a 128-bit LPDDR4/4x/5 memory interface, and a UFS 4.0 storage interface. That’s about all we know about the RK3688 right now, but we can also deduct it’s probably based on a new, yet-to-be-announced Arm Cortex-A7xx core, possibly named Cortex-A730 or Cortex-A735, because no Arm cores have been announced with the Armv9.3 architectures. The Arm Cortex-A725 CPU core unveiled last May still relies on Armv9.2, and I’d expect new Arm cores to be introduced within the next few months unless Rockchip made a mistake in the presentation slide above. Two other platforms were also announced at the same time starting with a new entry-level/mid-range RK35XX octa-core […]

Posted on by Debashis Das - 4 Comments on Altera’s 7nm Agilex 3 SoC FPGA features Cortex-A55 cores, AI Tensor Block, DSP, 10 GbE, and more.

Altera’s 7nm Agilex 3 SoC FPGA features Cortex-A55 cores, AI Tensor Block, DSP, 10 GbE, and more.

Altera Agilex 3 AI SoC FPGA

Altera, an independent subsidiary of Intel, has launched the Altera Agilex 3 SoC FPGA lineup built on Intel’s 7nm technology. According to Altera, these FPGAs prioritize cost and power efficiency while maintaining essential performance. Key features include an integrated dual-core Arm Cortex A55 processor, AI capabilities within the FPGA fabric (tensor blocks and AI-optimized DSP sections), enhanced security, 25K–135K logic elements, 12.5 Gbps transceivers, LPDDR4 support, and a 38% lower power consumption versus competing FPGAs. Built on the Hyperflex architecture, it offers nearly double the performance compared to previous-generation Cyclone V FPGAs. These features make this device useful for manufacturing, surveillance, medical, test and measurement, and edge computing applications. Altera’s Agilex 3 AI SoC FPGA specifications Device Variants B-Series – No definite information is available C-Series – A3C025, A3C050, A3C065, A3C100, A3C135 SoC FPGAs Hard Processing System (HPS) – Dual-core 64-bit Arm Cortex-A55 up to 800 MHz that supports secure […]

Posted on by Debashis Das - No Comments on ADLINK AVA-1000 is a rugged EN50155-compliant T2G gateway for railway and industrial applications

ADLINK AVA-1000 is a rugged EN50155-compliant T2G gateway for railway and industrial applications

ADLINK AVA 1000 T2G gateway top view

The ADLINK AVA-1000 T2G gateway is a rugged, EN50155-compliant T2G (Train-to-Ground) gateway designed for railway and industrial environments. Powered by a choice of NXP i.MX8M Plus Quad Cortex-A53 processor or an Intel Processor N50 Alder Lake-N processor. The i.MX8M Plus model is equipped with up to 8GB LPDDR4 and a 64GB eMMC flash whereas the Alder Lake variant features up to 4GB LPDDR5 memory and a 32GB eMMC flash. In terms of connectivity, the gateway features three M12 GbE ports and supports a wide range of options including 5G, WiFi 6, and GNSS. The AVA-1000 T2G gateway’s fanless design, wide operating temperature range, and 24-110V DC input ensure reliable operation in industrial environments. Additionally, its compliance with EN50155 and other industrial standards makes it ideal for various industrial applications. AVA-1000 T2G gateway specifications System Processor (multiple options) NXP i.MX8M Plus quad-core Cortex-A53 processor @ up to 1.8 GHz with Cortex-M7 […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 3 Comments on Linux 6.11 Release – Notable changes, Arm, RISC-V and MIPS architectures

Linux 6.11 Release – Notable changes, Arm, RISC-V and MIPS architectures

Linux 6.11 release

Linux 6.11 is out with Linus Torvalds’ announcement on the Linux kernel mailing list (LKML): I’m once again on the road and not in my normal timezone, but it’s Sunday afternoon here in Vienna, and 6.11 is out. The last week was actually pretty quiet and calm, which is nice to see. The shortlog is below for anybody who wants to look at the details, but it really isn’t very many patches, and the patches are all pretty small. Nothing in particular stands out – the biggest patch in here is for Hyper-V Confidential Computing documentation. Anyway, with this, the merge window will obviously open tomorrow, and I already have 40+ pull requests pending. That said, exactly _because_ I’m on the road, it will probably be a fairly slow start to the merge window, since not only am I on my laptop, there’s OSS Europe starting tomorrow and then the […]

Posted on by Debashis Das - 12 Comments on Raspberry Pi RP2350 dev board features Ethernet RJ45 port with WIZNet W5500 or W5100S Ethernet controller

Raspberry Pi RP2350 dev board features Ethernet RJ45 port with WIZNet W5500 or W5100S Ethernet controller

Wiznet W5500 EVB Pico2 and W5100S EVB Pico2 Dev boards

WIZnet has recently launched two new Raspberry Pi RP2350-based Ethernet boards – W5100S-EVB-Pico2 and W5500-EVB-Pico2 – based on different Ethernet controllers. The entry-level W5100S-EVB-Pico2 is built around the W5100S controller that features 4 independent sockets and 16 Kbytes of buffer memory. On the other hand, the W5500-EVB-Pico2 is built around the W5500, which features 8 sockets, 32 Kbytes of buffer memory, and improved security features such as OTP memory, Secure Boot, and Arm TrustZone technology. These make the W5500-EVB-Pico2 ideal for projects with robust network handling and advanced security measures. After the recent announcement of the $5 Raspberry Pi Pico 2 we have seen many development boards built around the RP2350 MCU, including the Challenger+ RP2350 WiFi6/BLE5, the Solder Party’s RP2350 Stamp, the Seeed Studio XIAO RP2350, the Cytron MOTION 2350 Pro, and more. Feel free to check those out If you are interested in RP2350-based dev boards. W5100S-EVB-Pico2 and […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 6 Comments on DietPi 9.7 and Armbian 24.8 released with improved support for Rockchip, Amlogic, and Allwinner SBCs

DietPi 9.7 and Armbian 24.8 released with improved support for Rockchip, Amlogic, and Allwinner SBCs

DietPi 9.7 Orange Pi 5 Plus

Armbian and DietPi are two separate projects that provide Linux-based OS images optimized for Arm-based single board computers. The last time we had a look at both projects was in June with the release of Armbian 24.5.1 and DietPi 9.4, but there have been several updates since then including the releases of the latest DietPi 9.7 and Armbian 24.8 Yelt just a few days ago. So let’s check out the latest changes. DietPi 9.7 DietPi is a lightweight Debian-based Linux distribution for SBCs and server systems that ships as a minimal image but users can install any packages they want, including the ones required for desktop environment, to match the requirements of the applications. It’s notably used by the Linamp project – a Raspberry Pi 4-based project that brings WinAMP to real life – that we covered a few weeks ago. DietPi 9.7 was released on August 25, 2024 with […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 12 Comments on Using RISC-V cores on the Raspberry Pi Pico 2 board and RP2350 MCU – From blinking an LED to building Linux

Using RISC-V cores on the Raspberry Pi Pico 2 board and RP2350 MCU – From blinking an LED to building Linux

Raspberry Pi Pico 2 RP2350 RISC-V review

Raspberry Pi Pico 2 was released last month with a Raspberry Pi RP2350 microcontroller equipped with two Arm Cortex-M33 cores and two 32-bit RISC-V “Hazard3” cores with up to two cores usable at any time. So in this guide, we’ll show how to use the RISC-V cores on the RP2350 MCU, compare their performance against the Arm Cortex-M33 cores, and even build Linux for RISC-V for RP2350 boards that have PSRAM. Apart from the extra memory and more powerful cores, plus new features related to security and the HSTX interface, the Raspberry Pi Pico 2 and Pico will be very similar to the end user and the instructions in our article “Getting Started with Raspberry Pi Pico using MicroPython and C” remain valid. I don’t think there’s a MicroPython RISC-V image yet, so we’ll focus on running C programs on the RISC-V cores. A quick check with the Arm cores […]

UP 7000 x86 SBC