Mesa 20.3 released with Raspberry Pi 4 V3DV driver, Panfrost Bifrost support

Mesa 20.3 Raspberry Pi 4 Mali Bifrost

We’ve previously reported that the Vulkan 1.0 conformant V3DV driver for Raspberry Pi 4 and other Broadcom BCM2711 based platforms was part of Mesa 20.3 open-source graphics framework. But at the time, it was still under development. The good news is that Mesa 20.3 has now been released, and there’s much more than Raspberry Pi 4 support, as Collabora informed us the release also included Arm Mali Bifrost GPU support via the open-source Panfrost driver. The latter was made possible thanks to the work by Alyssa Rosenzweig and Boris Brezillon, with Alyssa going into details in a recent blog post on Collabora. More work is still needed with better performance and OpenGL 3.1 being the focus in the months ahead. But there were also many other changes in Mesa 20.3 as reported by Phoronix: OpenGL 4.6 and Vulkan 1.2 APIs support Initial support for Intel Gen12 Alder Lake graphics and […]

DevTerm with ClockworkPi v3.14: a modular, portable computer

DevTerm Portable Computer

After the launch of ClockworkPi GameShell in Q4 2018, now ClockworkPi has come with yet another exciting product. DevTerm is a portable computer that comes with a 6.8-inch IPS screen, a keyboard with 67 keys, and a battery module, all connected to ClockworkPi v3.14 carrier board and a choice of core modules. It will also come with an optional built-in thermal printer. ClockworkPi v3.14 Mainboard and the Core boards The mainboard ClockworkPi v3.14 uses a compact design and comes with a reduced size of 95x77mm. With a modular design, it gives you a choice of “core board” modules for various applications. Moreover, ClockworkPi v3.14 is now compatible with the Raspberry Pi CM3 series, which means that your work on the Raspberry Pi can be “teleported” to a portable terminal without hassle. It has integrated 5GHz WIFI (802.11ac) and Bluetooth 5.0 which makes it suitable for wireless communication applications as well. […]

Arm Cortex-A78C core supports up to 8 cores per cluster, 8MB L3 cache for always-on laptops

Arm Cortex-A78C

[Update November 7, 2020:  Correction for the meaning of “multi-OS support” on Arm Cortex-A78AE core] Arm Cortex-A78 CPU core was first introduced in May 2020 with a focus on mobile devices like smartphones and was followed by Cortex-A78AE for automotive and industrial embedded applications in September. The company has now introduced a new variant with Arm Cortex-A78C supporting up to eight cores per cluster, a larger cache up to 8MB for higher performance, and advanced security features all designed for always-on laptops and other “on-the-go” devices. Arm Cortex-A78C key features and specifications: Architecture –  Armv8-A (Harvard) Extensions – Armv8.1, Armv8.2, Cryptography, and RAS; Armv8.3 (LDAPR instructions only), Armv8.3-A and Armv8.6-A Pointer Authentication support (excluding the optional FPAC extension), and Armv8.4 multi-OS support ISA support – A64, A32, and T32 (at EL0 only) Microarchitecture Pipeline – Out of order Superscalar Neon / Floating Point Unit Optional cryptography Unit Max number of […]

Arm Ethos-U65 microNPU enables low-power AI inference on Cortex-A & Neoverse SoC’s

Ethos-U65 - Cortex-M vs Cortex A/Neoverse Diagrams

Arm introduced their very first microNPU (Micro Neural Processing Unit) for microcontrollers at the beginning of the year with Arm Ethos-U55 designed for Cortex-M microcontrollers such as Cortex-M55, and delivering 64 to 512 GOPS of AI inference performance or up to a 480x increase in ML performance over Cortex-M CPU inference. The company has now unveiled an update with Arm Ethos-U65 microNPU that maintains the efficiency of Ethos-U55 but enables neural network acceleration in higher performance embedded devices powered by Arm Cortex-A and Arm Neoverse SoCs. Arm Ethos-U65 delivers up to 1 TOPS, and as seen in the diagram enables features that can not be done with Ethos-U55 including object classification and real-time classification. Compared to Ethos-N78 NPU, the new microNPU offers less AI performance, but a significantly higher efficiency although AFAIK no quantified by Arm. The company says the development workflow remains the same with the use of the […]

Linux 5.9 Release – Main Changes, Arm, MIPS & RISC-V Architectures

Linux 5.9 release

Linus Torvalds has just announced the release of Linux 5.9 on lkml: Ok, so I’ll be honest – I had hoped for quite a bit fewer changes this last week, but at the same time there doesn’t really seem to be anything particularly scary in here. It’s just more commits and more lines changed than I would have wished for. The bulk of this is the networking fixes that I already mentioned as being pending in the rc8 release notes last weekend. In fact, about half the patch (and probably more of the number of commits) is from the networking stuff (both drivers and elsewhere). Outside of that, the most visible thing is a reinstatement of the fbdev amba-clcd driver – that’s a noticeable patch, but it’s basically just mainly a revert. The rest is really really tiny (mostly some other minor driver updates, but some filesystem and architecture fixes […]

Xilinx Zynq UltraScale+ ZU19EG MPSoC Devkit Offers HDMI 2.0, 10GbE, High-Speed Transceivers

Zynq Ultrascale+ ZU19EG Development Kit

iWave Systems iW-RainboW-G35D is a development kit powered by Xilinx Zynq UltraScale+ ZU19EG Arm Cortex-A53 and FPGA MPSoC coupled with 4GB DDR4 RAM with ECC for the processing system (PS) & 4GB dual-channel DDR4 RAM for the programmable logic (PL). The board is equipped with HDMI 2.0 output/input ports supporting 4Kp60 UHD resolutions, a 10GbE SFP+ cage, FMC+, FMC, FireFly, and QSFP connectors for high-speed transceivers, and more. iW-RainboW-G35D specifications: iW-RainboW-G35M SoM Xilinx Zynq Ultrascale+ ZCU19EG MPSOC (-1 speed) with four Cortex-A53 cores @ 1200 MHz, dual-core Arm Cortex-R5 MPCore up to 600MHz, FPGA fabric with 1,143K logic cells, and Arm Mali-400 MP2 GPU (lower-end ZCU17EG and ZCU11EG MPSoC are also available) System Memory 4GB DDR4 RAM for PS 4GB Dual DDR4 RAM for PL Storage – 8GB eMMC Flash (for boot code) Transceivers PS-GTR Transceivers x 4 @ 6Gbps PL-GTH Transceivers x 32 @ 16.3Gbps PL-GTY Transceivers x 16 […]

Arm CPU Roadmap to 2022 – Matterhorn and 64-bit only Makalu CPU Cores

Arm Roadmap Peak Performance Matterhorn & Makalu

The Arm DevSummit 2020, previously known as Arm TechCon, is taking place virtually this week until Friday 9th, and besides some expected discussions about NVIDIA’s purchase of Arm, there have been some technical announcements, notably a high-performance CPU roadmap for the next two years, which will see Matterhorn (Cortex-A79?) in 2021, and Makalu (Cortex-A80?), the first 64-bit only Arm processor, in 2022. The company did not provide many details about the new cores, but they expected a peak performance uplift of up to 30% from the Cortex-A78 to the future Makalu generations. It should be noted that while performance keeps improving, the curve has flattened a bit. But the main announcement is that starting from 2022, all high-end Arm CPU cores (i.e. the “big” cores) will be 64-bit. So far, most Cortex-A cores supported both 32-bit (Aarch32) and 64-bit (Aarch64) architecture, and as we noted four years ago, the latter […]

Arm Announces Cortex-A78AE CPU, Mali-G78AE GPU & Mali-C71AE ISP for autonomous automotive & industrial applications

Cortex-A78AE

Arm has announced new CPU, GPU, and ISP specifically designed for autonomous automotive and industrial applications with respectively Cortex-A78AE CPU, Arm Mali-G78AE GPU, and Arm Mali-C71AE ISP. Arm Cortex-A78AE CPU Key features and specifications: Architecture – Armv8.2-A (AArch32 at ELO only) Extensions – Armv8.1, Armv8.2, and Armv8.3 extensions (LDAPR instructions only), RAS extensions, Armv8.4 Dot Product, Cryptography extensions, RAS extensions Microarchitecture Up to 4x CPU cores per cluster Out of order pipeline Neon / Floating Point Unit included with INT8 Dot Product and IEEE FP16 Optional Cryptography Unit 48-bit Physical Addressing (PA) Memory system and external interfaces 32kB to 64kB L1 I-Cache / D-Cache 256kB to 512kB L2 Cache Optional 512kB to 4MB L3 Cache ECC Support LPAE Bus interfaces – AMBA ACE or CHI Optional ACP, peripheral port Functional Safety Support – ASIL D Systematic1 and ASIL D Diagnostic2 Security – TrustZone Interrupts – External GICv4 Generic timer – […]

EmbeddedTS embedded systems design