risc-v News - Page 23 of 51 - CNX Software

May 23, 2022May 23, 2022 by Jean-Luc Aufranc (CNXSoft) - 7 Comments

CherryUSB – A lightweight USB device/host stack for embedded systems

CherryUSB USB stack for embedded systems

CherryUSB is a lightweight open-source USB device/host stack for embedded systems with one or more USB interfaces. The stack implements various class drivers such as CDC, HID, MSC, audio, video, and so on. It’s apparently part of Boufallo Lab SDK (e.g. for BL702 MCU), and has been ported and tested with WCH CH32V307 RISC-V MCU, STMicro STM32F4, and Nuvoton NUC442 Cortex-M4 microcontroller, as well as a two Arm Cortex-M3 microcontrollers I’ve never heard of: EastSoft ES32F3 and MindMotion MM32L3xx. CherryUSB device stack highlights: Support for USB2.0 full and high speed Endpoint irq callback USB classes support Composite Device Communication Device Class (CDC) Human Interface Device (HID) including “Custom HID” Mass Storage Class (MSC) USB VIDEO Class (UVC1.0,UVC1.5) USB AUDIO Class (UAC1.0, UAC2.0) Device Firmware Upgrade CLASS (DFU) MIDI CLASS (MIDI) Test and Measurement CLASS (TMC) Vendor class Remote NDIS (RNDIS) support Support WINUSB 1.0,WINUSB 2.0 with BOS (Binary Device Object […]

May 23, 2022 by Jean-Luc Aufranc (CNXSoft) - 1 Comment

Linux 5.18 release – Main changes, Arm, RISC-V, and MIPS architectures

Linux 5.18 is out! Linus Torvalds has just announced the release on lkml: No unexpected nasty surprises this last week, so here we go with the 5.18 release right on schedule. That obviously means that the merge window for 5.19 will open tomorrow, and I already have a few pull requests pending. Thank you everybody. I’d still like people to run boring old plain 5.18 just to check, before we start with the excitement of all the new features for the merge window. The full shortlog for the last week is below, and nothing really odd stands out. The diffstat looks a bit funny – unusually we have parsic architecture patches being a big part of it due to some last-minute cache flushing fixes, but that is probably more indicative of everything else being pretty small. So outside of the parisc fixes, there’s random driver updates (mellanox mlx5 stands out, […]

May 17, 2022October 21, 2022 by Jean-Luc Aufranc (CNXSoft) - 10 Comments

Ubuntu Kylin 20.04 OS works on RISC-V hardware

China-developed Ubuntu Kylin 20.04 is now supporting RISC-V architecture with an image for HiFive Unmatched mini-ITX motherboard, and work will be done on an unnamed Starfive SBC that should be the VisionFive board with a GPUless JH7100 dual-core RISC-V SoC or an upgraded version with JH7110 SoC featuring an Imagination IMG BXE-4-32 GPU. You may have read recent reports about China asking government entities, including state-owned enterprises (SOE), to replace foreign hardware and software within a two-year period. So that means avoiding systems based on Intel and AMD processors, so working on RISC-V open architecture makes perfect sense, since over time, Chinese manufacturers should be able to make RISC-V SoCs and PCs based on those processors, albeit probably not within the next two years at any significant scale. Ubuntu Kylin 20.04 RISC-V, as well as the newly released Ubuntu Kylin 22.04 x86, can be found on the English download page […]

May 17, 2022May 18, 2022 by Jean-Luc Aufranc (CNXSoft) - 8 Comments

“ESP32-C3-0.42LCD” is a tiny WiFi & BLE IoT board with 0.42-inch display, Qwiic connector

01Space “ESP32-C3-0.42LCD” is a small (23.5 x 18 mm) board equipped with ESP32-C3 RISC-V WiFi and Bluetooth microcontroller, a 0.42-inch display, and a Qwicc I2C connector to easily add modules such as sensors. The first time I saw it, the form factor immediately reminded me of the nRF52840-based XIAO BLE Sense board I just used to test Edge Impulse machine learning framework. Both boards should have similar use cases, but XIAO BLE Sense includes a 6-axis IMU sensor, and I had to connect an OLED display, while the ESP32-C3 board already integrates a display, and I would have had to connect an external Qwicc module with an accelerometer. ESP32-C3-0.42LCD specifications: SoC – ESP32-C3FH4 SoC with RISC-V core @ 160 MHz, 4MB flash, 2.4GHz Wi-Fi, and Bluetooth 5 LE with Long-Range support Ceramic antenna Display – 0.42-inch LCD USB – 1x USB Type-C port for power and programming Expansion Qwiic I2C connector […]

May 16, 2022August 9, 2022 by Jean-Luc Aufranc (CNXSoft) - 3 Comments

Embedded World 2022 – June 21-23 – Virtual Schedule

Embedded World 2020 was a lonely affair with many companies canceling attendance due to COVID-19, and Embedded World 2021 took place online only. But Embedded World is back to Nuremberg, Germany in 2022 albeit with the event moved from the traditional month of February to June 21-23. Embedded systems companies and those that service them will showcase their latest solution at their respective booths, and there will be a conference with talks and classes during the three-day event. The programme is up, so I made my own little Embedded World 2022 virtual schedule as there may be a few things to learn, even though I won’t be attending. Tuesday, June 21, 2022 10:00 – 13:00 – Rust, a Safe Language for Low-level Programming Rust is a relatively new language in the area of systems and low-level programming. Its main goals are performance, correctness, safety, and productivity. While still ~70% of […]

May 11, 2022 by Jean-Luc Aufranc (CNXSoft) - 4 Comments

MIPS unveils RISC-V eVocore P8700 and I8500 multiprocessor IP cores

MIPS is dead, right? Well, there’s now very little done on the architecture itself, MIPS (the company) has decided to switch to RISC-V architecture, and unveiled the eVocore product lineup currently comprised of the eVocore P8700 and I8500 multiprocessor IP cores. The 64-bit cores are scalable from single-core multi-thread to a single cluster with multiple cores, and up to a multi-cluster, and target high-performance, real-time compute applications such as networking, data centers, and automotive. The eVocore P8700 comes with a 16-stage deep pipeline with multi-issue Out-of-Order (OOO) execution and multi-threading. MIPS claims it has single-threaded performance greater than what is currently available in other RISC-V CPU IP offerings, but did not provide any numbers. It will likely be used in the cloud and high-end servers as it can scale up to 64 clusters, 512 cores and 1,024 harts/threads. P8700 highlights: Multi-issue superscalar Out of Order (OOO) with Multi-threading 16-stage pipeline […]

May 8, 2022May 12, 2022 by Jean-Luc Aufranc (CNXSoft) - 4 Comments

Canaan K510 CRB RISC-V AI development kit ships with dual-camera module and LCD display

Canaan K510 dual-core RISC-V AI development board

Last summer, Canaan introduced the Kendryte K510 tri-core RISC-V AI processor, now also known as Canaan K510, as an updated version of the Kendryte K210 with a much higher 3 TOPS of performance, but at the time, there were no development board and SDK. But I’ve now just been informed of the availability of the Canaan Kendryte K510 CRB (customer reference platform) AI development kit with camera module and LCD display, as well as a software development kit with U-Boot, Linux, and AI tools which can be used to develop smart audio and computer vision applications. Kendryte K510 CRB-Kit development kit specifications: SoC – Canaan Kendryte K510 dual-core RISC-V64 CPU up to 800MHz and 1x RISC-V DSP up to 800MHz for up to 3 TOPS AI performance, ultra-low-power wake-up VAD, H.264 video encoding up to 2 channels @ 1080p60 System Memory – 512 MB LPDDR3 @ 1600 MHz Storage – […]

May 6, 2022 by Jean-Luc Aufranc (CNXSoft) - 7 Comments

Allwinner V853 Arm Cortex-A7 + RISC-V SoC comes with 1 TOPS NPU for AI Vision applications

Allwinner V853 SoC combines an Arm Cortex-A7 core with a Xuantie E907 RISC-V core, and a 1 TOPS NPU for cost-sensitive AI Vision applications such as smart door locks, smart access control, AI webcams, tachographs, and smart desk lamps. Manufactured with a 22nm process, the SoC comes with an ISP image processor and Allwinner Smart video engine capable of up to 5M @ 30fps H.265/H.264 encoding and 5M @ 25fps H.264 decoding, offers parallel CSI and MIPI CSI camera interfaces, and well as MIPI DSI and RGB display interfaces. Allwinner V853 specifications: CPU Arm Cortex-A7 CPU core @ 1 GHz with 32 KB I-cache, 32 KB D-cache, and 128 KB L2 cache Alibaba Xuantie E907 RISC-V core with 16 KB I-cache and 16 KB D-cache NPU (Neural network Processing Unit) – Up to 1 TOPS for V853 and 0.8 TOPS for V853S, embedded 128KB internal buffer, support for TensorFlow, Caffe, […]