risc-v News - Page 21 of 51 - CNX Software

August 18, 2022August 23, 2022 by Jean-Luc Aufranc (CNXSoft) - No Comments

StarFive VisionFive V1 RISC-V SBC gets Ubuntu 22.04.1 Server image from Canonical

Canonical has been working on RISC-V support for Ubuntu for a while and released Ubuntu 20.04/21.04 64-bit RISC-V images for QEMU and HiFive boards last year. Now the company has released an Ubuntu 22.04.1 Server image for the StarFive VisionFive V1 RISC-V single board computer. While that’s a good development, The VisionFive V1, and other RISC-V platforms, are nowhere close to being Ubuntu-certified hardware, and Canonical posted a note reading “It is an early RISC-V developer access through Ubuntu 22.04.1.” The VisionFive V1 SBC is a pretty good platform for development with a StarFive JH7100 dual-core RISC-V processor, 8GB RAM, Gigabit Ethernet and WiFi connectivity, HDMI output, and four USB 3.0 ports, plus GPIOS headers, and MIPI CSI and DSI connectors. It offers a good middle ground between the high-end (and relatively expensive) HiFive Unmatched mini-ITX motherboard and the low-end Allwinner Nezha single board computer both of which can also […]

August 17, 2022 by Jean-Luc Aufranc (CNXSoft) - 2 Comments

TinyMaix is a lightweight machine learning library for microcontrollers

Sipeed TinyMaix open-source machine learning library is designed for microcontrollers, and lightweight enough to run on a Microchip ATmega328 MCU found in the Arduino UNO board and its many clones. Developed during a weekend hackathon, the core code of TinyMax is about 400 lines long, with a binary size of about 3KB, and low RAM usage, enabling it to run the MNIST handwritten digit classification on an ATmega320 MCU with just 2KB SRAM and 32KB flash. TinyMax highlights Small footprint Core code is less than 400 lines (tm_layers.c+tm_model.c+arch_O0.h), code .text section less than 3KB Low RAM consumption, with the MNIST classification running on less than 1KB RAM Support INT8/FP32 model, convert from keras h5 or tflite. Support multi-architecture acceleration: ARM SIMD/NEON, MVEI, RV32P, RV64V (32-bit & 64-bit RISC-V vector extensions) User-friendly interfaces, just load/run models Supports full static memory config MaixHub Online Model Training support coming soon Sipeed says there […]

August 4, 2022 by Jean-Luc Aufranc (CNXSoft) - 10 Comments

HydraUSB3 RISC-V MCU board combines USB 3.0 with HSPI and SerDes high-speed interfaces

Benjamin VERNOUX has launched the HydraUSB3 V1 board based on WCH CH569 RISC-V MCU as a developer platform to experiment with high-speed protocols like HSPI and SerDes through a USB 3.0 interface. It’s the third board from Benjamin we feature here, after the STM32-based HydraBUS and the HydraNFC v2 shield delivering up to 1600 mW for NFC charging and connectivity. The HydraUSB3 v1 is quite different since it does not involve NFC at all, and instead leverages the CH569’s high-speed interfaces including USB 3.0 (5 Gbps), HSPI (3.8Gbps), and SerDes (>1.2Gbps). HydraUSB3 V1 specifications: MCU – WCH CH569 32-bit RISC-V (RISC-V3A) RV32IMAC MCU @ 120MHz with 16KB 32-bit SRAM, 96KB configurable 128-bit SRAM, 448KB code flash, 32KB data flash USB – 1x USB 3.0 host/device port that supports the USB 3.0 SS built-in PHY (5Gbps) and USB 2.0 built-in PHY FS/LS/HS (480Mbps) High-speed I/Os High-Speed Parallel Interface (HSPI) up to […]

August 3, 2022 by Jean-Luc Aufranc (CNXSoft) - 1 Comment

Milandr MDR32F02FI is a RISC-V microcontroller for (Russian) electricity meters

Last year, we wrote about the Made-in-Russia Mikron MIK32 RISC-V microcontroller with features similar to STM32L0 Arm Cortex-M0+, and I was recently told that the first fully packed samples are expected for the end of autumn. But it turns out there’s another Russian company that makes RISC-V microcontrollers, and for instance, the Milandr MDR32F02FI features the open-source BM-310 RISC-V MCU core and is specially designed for electricity meters. It is the second generation of the microcontroller with the first being based on Arm Cortex-M0 core and produced for over 5 years. Milandr MDR32F02FI specifications: CPU – CloudBEAR BМ-310S 32-bit RISC-V core @ 60 MHz Memory – 112KB Storage – 256+8 KB flash, 16KB OTP Electricity meter function 7-channel 24-bit sigma-delta ADC Hardware unit for calculating power consumption Other Peripherals 5x UART, 3x SPI, 1x I2C Up to 55x GPIOs Instrumental ADC – 10-bit with temperature sensor 4x 32-bit timer blocks […]

August 1, 2022August 1, 2022 by Jean-Luc Aufranc (CNXSoft) - 14 Comments

Linux 5.19 Release – Main changes, Arm, RISC-V and MIPS architectures

Linus Torvalds has just announced the release of Linux 5.19. It should be the last 5.xx version, with Linux 6.0 coming for the next cycle: So here we are, one week late, and 5.19 is tagged and pushed out. The full shortlog (just from rc8, obviously not all of 5.19) is below, but I can happily report that there is nothing really interesting in there. A lot of random small stuff. In the diffstat, the loongarch updates stand out, as does another batch of the networking sysctl READ_ONCE() annotations to make some of the data race checker code happy. Other than that it’s really just a mixed bag of various odds and ends. On a personal note, the most interesting part here is that I did the release (and am writing this) on an arm64 laptop. It’s something I’ve been waiting for for a _loong_ time, and it’s finally reality, […]

July 29, 2022August 4, 2022 by Jean-Luc Aufranc (CNXSoft) - 29 Comments

Pinecil V2 soldering iron gets BL706 Bluetooth LE RISC-V MCU, USB PD EPR support

PINE64 is about to launch the second generation Pinecil RISC-V soldering iron with the Pinecil V2 featuring a new Bouffalo Lab BL706 RISC-V microcontroller with Bluetooth LE connectivity, optimizations for higher power levels, as well as tentative support for the new USB PD EPR standard (Extended Power Range) working at up to 28V. I don’t solder every day, but when I do, I use my Pinecil soldering iron, as it’s heating super fast and does the job, and in my case, works quite better than the TS100 soldering iron. So it should come as no surprise that the Pincel is the most popular consumer hardware from the PINE64 community (after SOPine modules), and the new Pinecil V2 is a welcome upgrading building on the same design but with Bluetooth LE connectivity and a lower tip resistance. Pinecil V2 preliminary specifications: MCU – Bouffalo Lab BL706 32-bit RISC-V microcontroller @ 144 […]

July 14, 2022July 14, 2022 by Jean-Luc Aufranc (CNXSoft) - 6 Comments

YD-CH32V307VCT6 RISC-V MCU board comes with Ethernet and plenty of I/Os

VCC-GND Studio CH32V307 RISC-V Ethernet board

At the beginning of the year, we wrote about WCH CH32V307 RISC-V microcontroller and a development board with 8 UART ports controlled over Ethernet. I’ve now been informed of a similar, but much more compact by VCC-GND Studio named “YD-CH32V307VCT6”. Besides the 144 MHz RISC-V microcontroller, the board features a 10Mbps Ethernet port, two USB Type-C ports, SPI flash, EEPROM, a microSD card socket, and four rows of 24 pins each for a total of 96 pins exposing all pins out of the LQFP100 package. YD-CH32V307VCT6 board specifications: MCU – WCH CH32V307VCT6 32-bit RISC-V microcontroller @ 144 MHz with 256K Flash, 64K SRAM Storage – 32Mbit SPI NOR flash (W25Q32), 64kbit EEPROM (24C64), MicroSD card slot Networking – 10 Mbps Ethernet USB – 1x USB 2.0 Type-C port (High Speed: 480 Mbps), 1x USB 2.0 Type-C port (Full Speed: 12 Mbps) Expansion – 2x 48-pin headers with 2 x 12-bit […]

July 8, 2022July 10, 2022 by Jean-Luc Aufranc (CNXSoft) - 15 Comments

RISC-X? Top Chinese scientist discusses potential for RISC-V fork in extreme case

Is RISC-X next? Bao Yungang, a professor and scientist at the Chinese Academy of Sciences and the secretary-general of the China RISC-V Alliance, has suggested RISC-V related standard specifications can be bifurcated into a new RISC-X standard independently developed in China for the “Belt and Road” countries. [Update July 9, 2022: The title has been updated, as Bao Yungang only answered a hypothetical question, and the screenshot below from a slack (maybe internal) shows SCMP may have misunderstood his meaning, and China would have no need to fork RISC-V based on how licensing works. I’ve also been given the link to Bao Yungang’s Zhuhi account, and there’s no mention of “RISC-X”. I’ve left the rest of the post unchanged for reference and general discussion about the topic] The world has become more complicated with new sanctions imposed nearly every week, and those include not only primary sanctions but also secondary […]