mips News - Page 6 of 19 - CNX Software

April 30, 2020 by Jean-Luc Aufranc (CNXSoft) - 2 Comments

QEMU 5.0 Supports Recent Armv8.x Features, Cortex-M7 CPU, Host Directory Access, and More

QEMU (Quick EMUlator) is an open-source emulator that’s great to run programs on various architectures such as Arm, RISC-V, and many others when you don’t own proper hardware. The developers have now released QEMU 5.0.0 will plenty of new features and such as support for Armv8.1 to Armv8.4 architectures, Arm Cortex-M7 processor, various changes to MIPS, PowerPC, RISC-V, s390… architectures, support for accessing a directory on the host filesystem from the guest using virtiofsd and more. There have been over 2800+ commits from 232 developers, so the list of changes to too long to write here, but some of the highlights include: Support for passing host filesystem directory to guest via virtiofsd Support for ARMv8.1 VHE/VMID16/PAN/PMU, ARMv8.2 UAO/DCPoP/ATS1E1/TTCNP, ARMv8.3 RCPC/CCIDX, ARMv8.4 PMU/RCPC Added ARM Cortex-M7 CPU support New Arm boards: tacoma-bmc, Netduino Plus 2, and Orange Pi PC Allwinner SoC model now wires up the USB ports TPM support for […]

April 26, 2020April 26, 2020 by Jean-Luc Aufranc (CNXSoft) - 8 Comments

Ingenic T31 AI Video Processor Combines MIPS & RISC-V Cores

Ingenic T31 MIPS & RISC-V Video Processor

Last week we asked “is MIPS dead?” question following the news that Wave Computing had filed for bankruptcy, two MIPS Linux maintainers had left, and China-based CIP United now obtained the exclusive MIPS license rights for mainland China, Hong Kong, and Macau. Ingenic is one of those Chinese companies that have offered MIPS-based processors for several years, but one commenter noted that Ingenic joined the RISC-V foundation, and as a result, we could speculate the company might soon launch RISC-V processors, potentially replacing their MIPS offerings. But Ingenic T31 video processor just features both with a traditional Xburst MIPS Core combines with a RISC-V “Lite” core Ingenic T31 specifications: Processors XBurst 1 32-bit MIPS core clocked at 1.5GHz with Vector Deep Learning accelerator based on SIMD128, 64KB + 128KB L1/L2 Cache RISC-V independent lite core System Memory – Built-in 512Mbit (64MB) or 1Gbit (128MB) DDR2 Storage – Quad SPI flash, […]

April 22, 2020 by Jean-Luc Aufranc (CNXSoft) - 12 Comments

Is MIPS Dead? Lawsuit, Bankruptcy, Maintainers Leaving and More…

When in 2018, Blu posted a guest post entitled “Baikal T1 MIPS Processor – The Last of the Mohicans?” I thought maybe it was too pessimistic with regard to the future of MIPS architecture. At the time, MIPS belonged to Imagination Technologies, but soon the company had its own financial problems and had to sell MIPS assets to Wave Computing. The latter eventually announced the launch of MIPS Open Initiative early last year, so there was some hope as interest might pick up to compete against RISC-V and Arm again. But in recent months, MIPS related news has not been so good. First, Wave Computing decided to end MIPS Open Initiative in November 2019, then Paul Burton and Ralf Baechle removed themselves from the Linux kernel MIPS maintainer list in February 2020, as their work with MIPS ended leaving Thomas Bogendoerfer as the only maintainer. But this month, things turned […]

March 30, 2020April 15, 2023 by Jean-Luc Aufranc (CNXSoft) - 2 Comments

Linux 5.6 Release – Main Changes, Arm, MIPS & RISC-V Architectures

Linus Torvalds has just announced the release of Linux 5.6 on the Linux Kernel Mailing List: So I’ll admit to vacillating between doing this 5.6 release and doing another -rc. This has a bit more changes than I’d like, but they are mostly from davem’s networking fixes pulls, and David feels comfy with them. And I looked over the diff, and none of it looks scary. It’s just slightly more than I’d have preferred at this stage – not doesn’t really seem worth delaying a release over. So about half the diff from the final week is network driver fixlets, and some minor core networking fixes. Another 20% is tooling – mostly bpf and netfilter selftests (but also some perf work). The rest is “misc” – mostly random drivers (gpio, rdma, input) and DTS files. With a smattering of fixes elsewhere (a couple of afs fixes, some vm fixes, etc). […]

January 27, 2020January 27, 2020 by Jean-Luc Aufranc (CNXSoft) - 1 Comment

Linux 5.5 Release – Main Changes, Arm, MIPS and RISC-V Architectures

Linux 5.5 has just been released by Linus Torvalds: So this last week was pretty quiet, and while we had a late network update with some (mainly iwl wireless) network driver and netfilter module loading fixes, David didn’t think that warranted another -rc. And outside of that, it’s really been very quiet indeed – there’s a panfrost driver update too, but again it didn’t really seem to make sense to delay the final release by another week. Outside of those, it’s all really tiny, even if some of those tiny changes touched some core files. So despite the slight worry that the holidays might have affected the schedule, 5.5 ended up with the regular rc cadence and is out now. That means that the merge window for 5.6 will open tomorrow, and I already have a couple of pull requests pending. The timing for this next merge window isn’t optimal […]

January 15, 2020 by Jean-Luc Aufranc (CNXSoft) - 12 Comments

Ingenic X1830 IoT Processor Features a 32-bit MIPS Core, 128MB DDR2 RAM

Ingenic is a silicon vendor based in Beijing, China and known for its MIPS Xburst processors such as JZ4780 dual-core SoC or T10 video processor. It’s been a while (a few years) since we last covered new processors from the company, but it appears the company launched another MIPS SoC for IoT applications last year. Meet Ingenic X1830 processor. X1830 specifications: CPU – MIPS32 XBurst-1 core @ up to 1.5 GHz with SIMD engine, 32KB instruction cache, 32KB data cache, 128KB unified L2 cache Memory – 128MB DDR2 in package Storage I/F – 2x SD/eMMC controllers, and Quad SPI (QSPI) VPU H264 Encoder up to 1080p80 or 1560×1600 resolution JPEG compressing/decompressing up to 70Mega-pixels per second ISP 12-bit RAW or up to 24-bit RGB Max input resolution 2688×2048 @20fps, 1080p @60fps,720p @120fps 2-D and 3-D noise reduction filter, advanced demosaic, color processing, lens shading, defog, glare, static/dynamic defect pixel… Image […]

January 14, 2020 by Jean-Luc Aufranc (CNXSoft) - 28 Comments

OpenWrt 19.07 Released with WPA3 Security, a Faster LuCI web interface

OpenWrt is a popular Linux operating system targeting embedded devices, usually routers (but not only), and serves as a complete replacement for the vendor-supplied firmware on supported devices. The developers released OpenWrt 19.07 on January 6, to succeed OpenWrt 18.06 the previous stable release. The new version brings various improvements including WPA3 support, client-side rendering of the LuCI web interface for faster rendering or a lower-load on the router, and introduces the ath79 target for MIPS routers with device tree support. While WPA3 WiFi security is part of OpenWrt 19.07, it is not enabled by default because the necessary packages hostapd-openssl (access point), wpa-supplicant-openssl (station support only) and wpad-openssl (AP + station) take a fair amount of space, and won’t fit on devices with 8MB flash or less. Another reason for not enabling WPA3 is that many existing client devices will never support WPA3, and some client devices that support […]

November 25, 2019 by Jean-Luc Aufranc (CNXSoft) - 3 Comments

Linux 5.4 Release – Main Changes, Arm, MIPS & RISC-V Architectures

Linus Torvalds has just announced the release of Linux 5.4: Not a lot happened this last week, which is just how I like it. And as expected, most of the pull requests I got were for the 5.5 merge window, which I’ll obviously start working through tomorrow. What little there is here is mostly some networking updates (mix of network drivers and core networking), and some minor GPU driver updates. Other than that it’s a small collection of random other things all over. The appended shortlog is small enough that you might as well just scroll through it. Anyway, this obviously opens the merge window for 5.5. It’s not ideal timing with Thanksgiving week coming up, but it hopefully shouldn’t be too much of an issue. If I fall behind (not because I’m all that big of a fan of the indiscriminate and relentless turkey-killing holiday) it’s because we’ve got […]