NXP i.MX Category - Page 41 of 68 - CNX Software

October 15, 2016February 8, 2023 by Jean-Luc Aufranc (CNXSoft) - 8 Comments

HMP, Real-Time Linux and Xenomai – A Look at Three Options to Develop Real-Time Linux Systems on Application Processors

This is a guest post about Heterogeneous Multicore Processing (HMP), Real-Time Linux, and Xenomai to develop real-time Linux systems written by Guilherme Fernandes, Raul Muñoz, Leonardo Veiga, Brandon Shibley, all working for Toradex. Introduction Application processor usage continues to broaden. System-on-Chips, usually powered by ARM Cortex-A cores, are taking over several spaces where small ARM Cortex-M, and other microcontroller devices, have traditionally dominated. This trend is driven by several facts, such as: The strong requirements for connectivity, often related to IoT and not only from a hardware point of view but also related to software, protocols, and security The need for highly interactive interfaces such as multi-touch, high-resolution screens, and elaborate graphical user interfaces; The decreasing price of SoCs, a consequence of its volume gain and new production capabilities. Typical cases exemplifying the statement above are the customers we see every day starting a product redesign upgrading from a microcontroller […]

October 6, 2016October 10, 2017 by Jean-Luc Aufranc (CNXSoft) - 4 Comments

Meet NXP i.MX8 Processor Families: i.MX 8 for High performance, i.MX 8M for Audio/Video & i.MX 8X for Low Power

Freescale and then NXP have been talking about i.MX8 processors for several years, and this spring unveiled i.MX 8 Multisensory Enablement Kit without giving much details about the processor except it would include both Cortex A72 & A53 cores. But NXP put out a press release yesterday about “Multisensory Automotive eCockpit Platform to Advance Multimedia Experiences in Future Cars” which appears to be the same news but with different words, except the content of the PR has more interesting bits such as: The new family, which is based on up to six 64-bit ARMv8-A technology processor cores and includes a HiFi 4 DSP, LPDDR4 and DDR4 memory support as well as dual Gigabit Ethernet with audio video bridging (AVB) capability, is designed to advance automotive dashboard graphics such as instrument clusters, infotainment visuals, heads-up displays, rear-seat screens and more. Capable of driving four HD screens with independent content or a […]

October 4, 2016May 29, 2017 by Jean-Luc Aufranc (CNXSoft) - 4 Comments

Linux 4.8 Release – Main Changes, ARM & MIPS Architectures

Linus Torvalds has officially released Linux 4.8 last Sunday: So the last week was really quiet, which maybe means that I could probably just have skipped rc8 after all. Oh well, no real harm done. This obviously means that the merge window for 4.9 is open, and I appreciate the people who already sent in some pull requests early due to upcoming travel or other reasons. I’ll start pulling things tomorrow, and have even the most eager developers and testers hopefully test the final 4.8 release before the next development kernels start coming 😉 Anyway, there’s a few stragging fixes since rc8 listed below: it’s a mixture of arch fixes (arm, mips, sparc, x86), drivers (networking, nvdimm, gpu) and generic code (some core networking, with a few filesystem, cgroup and and vm things). All of it pretty small, and there really aren’t that many of them. Go forth and test, […]

September 29, 2016 by Jean-Luc Aufranc (CNXSoft) - 2 Comments

NXP i.MX 6ULL Cortex A7 Processor is the Latest Member of i.MX6 32-bit ARM Processor Family

Freescale first unveiled i.MX6 processor family at CES 2011. Since then NXP has acquired Freescale, and kept working on the processors and even recently unveiled NXP i.MX 6ULL Cortex A7 processor promising 30 percent more power efficiency than its nearest competitors, and designed for “cost-effective solutions for the growing IoT consumer and industrial, mass markets”. NXP i.MX 6ULL key features and specifications: CPU – ARM Cortex A7 core @ up to 528 MHz with 128KB L2 cache Memory I/F – 16-bit DDR3/DDR3L, LPDDR2 memory support Storage I/F – 8/16-bit parallel NOR flash / PSRAM, dual-channel Quad-SPI NOR flash, 8-bit raw NAND flash with 40-bit ECC, 2x MMC 4.5/SD 3.0/SDIO Port Display & Camera I/F Parallel LCD Display up to WXGA (1366×768) Electrophoretic display controller support direct-driver for E-Ink EPD panel, with up to 2048×1536 resolution at 106 Hz 8/10/16/24-bit Parallel Camera Sensor Interface Peripherals 2x USB 2.0 OTG, HS/FS, Device […]

September 5, 2016 by Jean-Luc Aufranc (CNXSoft) - 4 Comments

OpenRex Open Source Hardware NXP i.MX6 Board Launched for 199 Euros and Up

OpenRex is an open source hardware board powered by NXP i.MX6 Cortex A9 processor designed by Fedevel for their hardware design course, and manufactured by Voipac, both companies based on Slovakia. The schematics, PCB layout, gerber files and other manufacturing files were released in February, but the company has only started selling the board a few days ago with OpenRex Basic SBC and OpenRex Max SBC boards. OpenRex Basic and Max boards specifications: SoC OpenRex Basic – NXP i.MX 6Solo single core Cortex A9 processor @ 1 GHz with 2D and 3D GPU OpenRex Max – NXP i.MX 6Quad quad core Cortex A9 processor @ 1 GHz with 2D and 3D GPU MCU – NXP LPC1345FHN33 ARM Cortex-M3 micro-controller @ 72 MHz System Memory Basic – 512 MB DDR3-1066 (400MHz) Max – 2GB DDR3-1066 (533 MHz) Storage Basic – micro SD slot, 1x 2Kbit I2C EEPROM, 1x 32Mbit SPI flash Max […]

July 25, 2016May 29, 2017 by Jean-Luc Aufranc (CNXSoft) - 7 Comments

Linux 4.7 Release – Main Changes, ARM and MIPS Architectures

Linux 4.7 is out: So, after a slight delay due to my travels, I’m back, and 4.7 is out. Despite it being two weeks since rc7, the final patch wasn’t all that big, and much of it is trivial one- and few-liners. There’s a couple of network drivers that got a bit more loving. Appended is the shortlog since rc7 for people who care: it’s fairly spread out, with networking and some intel Kabylake GPU fixes being the most noticeable ones. But there’s random small noise spread all over. And obviously, this means that the merge window for 4.8 is open.Judging by the linux-next contents, that’s going to be a bigger release than the current one (4.7 really was fairly calm, I blame at least partly summer in the northern hemisphere). Linus Linux 4.6 brought USB 3.1 superspeed, OrangeFS distributed file system, 802.1AE MAC-level encryption (MACsec), and BATMAN V protocol support, improved […]

July 21, 2016 by Jean-Luc Aufranc (CNXSoft) - No Comments

Gateworks Ventana GW5530 SBC is Designed for Drones, Robots, and Digital Signage

Gateworks Ventana is a family of boards based on NXP i.MX6 processor designed for embedded applications, and often include one or more mini PCIe ports for expansion. Their latest single board computer – Ventana GW5530 – is powered by an NXP i.MX 6Dual processor coupled with 512MB RAM, 256MB storage, a mini PCIe port, a micro SD / SIM card slot, micro HDMI output, and some I/Os. Ventana GW5530 specifications: SoC – NXP i.MX6 Dual Core ARM Cortex-A9 processor @ 800MHz with Vivante 2D and 3D GPUs System Memory – 512MB DDR3 (Up to 2GB as option) Storage – 256MB flash (Up to 2GB as option), micro SD/SIM card slot, serial configuration EEPROM Video & Audio Output – micro HDMI 1.4 port Connectivity – Optional u-blox EVA-M8M GPS Receiver with MMCX or u.FL Antenna Connector USB – 1x micro USB 2.0 OTG Port Sensors – 9-axis inertial module (accelerometer/gyro/magnetometer) Expansion […]

July 19, 2016July 19, 2016 by Jean-Luc Aufranc (CNXSoft) - 8 Comments

Setting a VoIP SIP user agent with Embedded Linux

This is a guest post by Leonardo Graboski Veiga, working for Toradex. Introduction This article’s main goals are: to cross-compile the PJSIP libraries and the PJSUA API reference implementation; deploy it to the target system; give an overview about the SIP protocol; and explore the reference implementation features, regarding audio only. For this purpose, a Computer on Module (CoM) from Toradex was chosen in the following configuration: Colibri iMX6DL* + Colibri Evaluation Board. The evaluation board and CoM are displayed in Figures 1 and 2, respectively. VOIP or Voice over IP, is a term designed to refer to a set of methods and technologies targeted for the implementation of telephony services over the Internet. For the purpose of this article, the scope will be limited to the use of a reference implementation built upon the SIP communication handling protocol by means of the PJSIP libraries and PJSUA2 API. If […]