Ingenic T40 4K Video & AI Vision Processor mixes MIPS & RISC-V cores with AI accelerator

Ingenic T31 MIPS & RISC-V AI video processor was introduced last year with the MIPS core including SIMD128 Vector instructions for deep learning. The Chinese company has now introduced the new Ingenic T40 processor still with MIPS and RISC-V cores, but also a dedicated 8 TOPS AI engine/CNN accelerator.

The new processor is especially suited to smart AI vision application thanks to support for 4K cameras, and 4K MJPEG/H.264/H.265 hardware video encoding, complemented by the 8 TOPS AI engine for computer vision workloads such as people detection, face recognition, object detection, and so on.

Ingenic T40 key features and specifications:

• CPU – Dual-core MIPS XBurst2 @ 1.2 GHz with 256KB L2 Cache, SIMD512 instruction set
• MCU – 600MHz RISC-V coprocessor
• AI Engine – 8 TOPS neural network accelerator with 1MB memory pool, support for int16/int8/int4/int2 convolution width
• Memory – DDR2/DDR3/DDR3L up to 2GB
• Storage – SPI NOR flash, SPI NAND flash, SD card, USB, all bootable
• Display -4-lane MIPI DSI for TFT/SLCD up to 1080p
• Camera
  • Interfaces – DVP/MIPI-CSI/BT1120/BT656 Sensor input interfaces; up to 3 channels
  • ISP
    • Tizano-III ISP engine with up to 3840×2160 input and processing resolution;
    • Dual sensor processing up to 2x 4MP
    • Three channels output – CH0@4K, CH1@5M, CH2@2M
    • Features – 3A, 3D, WDR, HDR, RGB IR, LDC,90° & 270° rotation
• Video Encoder – 4K H.265/H.264/JPEG video encoding up to 3840×2160@25fps
• Audio – Built-in Audio Codec, stereo AMIC input, and mono output
• Networking – 10/100M Ethernet MAC
• USB – USB 2.0 OTG
• Other Peripherals – RTC, 4x SADC, 8x PWM, 2x master SPI, 1x slave SPI, 4x I2C, 4x UART, 2x SDIO
• Security – Built-in Secure Boot logic, RSA2048+SHA256 protection algorithm

That’s about all information we get from the product page, although the company also talks about a “Magik AI algorithm development platform”, but I could not find what it exactly means. Since Ingenic T40 appears to be an update from the T31 processor, Linux should be running on the MIPS cores and an RTOS on the RISC-V core for fast wakeup when motion is detected.

Ingenic does not release any public information about T31/T40 SDK, and I could only find some files on OpenIPC website that all require a donation before download.

Thanks to Alex for the tip.

Jean-Luc Aufranc (CNXSoft)

Jean-Luc started CNX Software in 2010 as a part-time endeavor, before quitting his job as a software engineering manager, and starting to write daily news, and reviews full time later in 2011.

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