Glasgow Interface Explorer is an iCE40 FPGA based hardware debugging tool (crowdfunding)

We’ve seen some pretty interesting boards for hardware hackers and reverse engineers in recent months with the likes of Ollie and Tigard USB debug boards that allow interfacing various hardware interfaces and/or flashing firmware to different types of target boards.

Here’s another one: Glasgow Interface Explorer. Based on Lattice Semi iCE40 FPGA, the board is described as being “designed for hardware designers, reverse engineers, digital archivists, electronics hobbyists, and anyone else who wants to communicate with a wide selection of digital devices with minimum hassle”.

Glasgow Interface Explorer specifications:

• FPGA – Lattice Semiconductor iCE40HX8K FPGA
• USB – 1x USB-C port connected to FX2 high-speed USB interface capable of 480 Mbps throughput
• I/O headers
  • 2x 8-channel I/O banks with 16 highly flexible I/O
    • Each I/O bank comes with
      • A dedicated programmable linear voltage regulator, configurable from 1.8 V to 5 V and providing up to 150 mA of power
      • A dedicated sense ADC capable of monitoring the I/O bank voltage and current, with settable interrupt trigger thresholds
    • Each I/O supports up to 100 MHz and gets:
      • A dedicated voltage level shifter with individual direction control
      • A dedicated, software-controlled 10K Ohm pull-up/-down resistor
    • ESD protection diodes for all I/Os
  • Optional set of 14 differential pair I/O, connected directly to the FPGA for high-speed interfaces
• Dedicated SYNC connector
• Misc – 5x user LEDs, 5x status LEDs

As we’ve seen with other iCE40 boards, the FPGA can be programmed with various open-source FPGA tools including Yosys, nextpnr, and icestorm. 1BitSquared, the company behind the project, is using those projects together with nMigen to provide an easy-to-use Python API for the board:

Glasgow Interface Explorer is written in Python 3. The interface logic that runs on the FPGA is described using nMigen, which is a Python-based domain-specific language (DSL). The supporting code that runs on the host PC is written in Python with asyncio.

So the high-level software/hardware architecture of the systems looks as follows.

You’ll find everything you need on Github including hardware design files, firmware, software and documentation. Since the board is based on an FPGA, it is highly flexible, and the list of thing you could do with the board is pretty long:

• Standard Protocols
  • Communicate via standard UART
  • Initiate transactions via SPI or I²C
• Logic analyzer generating VCD file for analysis with GTKWave or Sigrok
• Read and write 24-series EEPROMs, 25-series Flash memories, ONFI-compatible Flash memories, parallel 27/28/29-series EPROMs, EEPROMs and flash memories,
• Microcontroller/CPU Programming and Debugging Interfaces
  • Program and verify AVR microcontrollers with SPI interface,
  • Automatically determine unknown JTAG pinout
  • Debug ARC processors via JTAG,
  • Debug some MIPS processors via EJTAG,
  • etc..
• FPGA/CPLD Bitstream Programming Interfaces for example program and verify XC9500XL CPLDs via JTAG
• Radio Interfaces – Communicate using nRF24L01(+) radios, program nRF24LE1 and nRF24LU1(+) microcontrollers
• Sensor Interfaces to measure data from temp
• Display & Video Interfaces
• Audio interfaces
• … and the list goes on.

Glasgow Interface Explorer has just launched on Crowd Supply where you can pledge $139 to get the latest RevC revision of the board together with a full set of flywire, sync, and USB-C cables. There’s also an optional CNC-milled and anodized aluminum case that adds $50. Shipping is free to the US and will depend on weight and destination for other countries. Shipping is scheduled for May 31, 2021.

Jean-Luc Aufranc (CNXSoft)

Jean-Luc started CNX Software in 2010 as a part-time endeavor, before quitting his job as a software engineering manager, and starting to write daily news, and reviews full time later in 2011.

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