[Update: MT8173 processor has now been announced, and it’s using Cortex A72 and A53 instead of A57/A53, as initially shown in the Linux kernel source code]
Mediatek is not exactly known to compliant with open source licences, or be involved with the open source community. But the company is certainly going into the right direction with their cooperation with Google leading to source code release for Android One smartphones, and the recently launched Mediatek Labs for community projects, starting with LinkIt One IoT platform. Mediatek is also regularly submitting code to the Linux ARM Kernel mailing list, and yesterday code was submitted for Mediatek MT8173 SoC, a 64-bit ARMv8 processor with two Cortex 53 and two Cortex 57 cores in big.LITTLE configuration. As far as I know, it could be the first Mediatek SoC with “big” Cortex A57 cores.
Code snippet from mt8173.dtsi related to CPU cores:
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cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x000>; + enable-method = "psci"; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x001>; + enable-method = "psci"; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x100>; + enable-method = "psci"; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x101>; + enable-method = "psci"; + }; + }; |
A short DTS file was also submitted for MT8173 tablet EVB (evaluation board):
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+#include "mt8173.dtsi" + +/ { + model = "mediatek,mt8173-evb"; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + }; + + memory { + reg = <0 0x40000000 0 0x40000000>; + }; +}; |
The memory section normally defines the location and size of the RAM (0x40000000 correspond to 1GB), but in this device tree file the location and size is shown twice, maybe because its a 64-bit platform addressed with 2x 1GB RAM (TBC) using 32-bit buses. An explanation of this would be welcomed.
That’s about all I know for know, except the new processor shares a lot with MT8135 and other MT65xx series. My search for MTK8173 / MT8173 did not yield interesting results so far.
Jean-Luc started CNX Software in 2010 as a part-time endeavor, before quitting his job as a software engineering manager, and starting to write daily news, and reviews full time later in 2011.
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Ok MT, now please do the same for the phone chips…
@Someone from the other side
They are doing it too, I can see some code for MT6589, and commond drivers (I2C, PMIC, etc..)
CNX, device tree cells are by definition 32 bits. That means that for 64-bit platforms, 2 consecutive cells are required for address/size value. They are given in big endian format to be human-friendly.
So, the above defines 1Gb of mem at 0x0000000040000000
@Paul
Thanks. That makes sense.
So the first “0 0x40000000” is for location, and the second “0 0x40000000” for size.
@Jean-Luc Aufranc (CNXSoft)
Yes. And just to clarify, this actually depends not on CPU bitness, but is configured in DTS file itself using #address-cells and #size-cells, e.g. https://github.com/torvalds/linux/blob/master/arch/arm/boot/dts/highbank.dts#L25 . It would be possible to have 2-cell vales for 32-bit CPUs too (if it has physical address extension for example), or 1-cell – on 64-bit, if its address spaces is capped to 4Gb, etc.
@Jean-Luc Aufranc (CNXSoft)
More interested in the mtk6732. Those Mali 4xx in the 32bit chips are close to useless in my view
This uses not A57, but A72 cores up to 2.4GHz.