Patrick Yang, CTO at WCH, has recently unveiled the CH570 RISC-V SoC with 2.4GHz wireless and USB 2.0 (host & device) as an upgrade to the popular CH32V003 general-purpose RISC-V MCU with more features at the same low price (10 cents).
CH570 also comes with 12KB SRAM and 256KB flash (vs 2KB SRAM and 16KB flash for the CH32V003), offers up to twelve GPIO, six PWM, I2C, UART, SPI, and a 20-channel key detection module. There’s also the CH572 with the same features, except it also supports Bluetooth LE 5.0. As a side note, I wrote about the CH572 RISC-V MCU with BLE in 2019, but I guess it was scraped likely because it had OTP instead of flash…, and the new CH572 (2025) is different.
WCH CH570/CH572 specifications:
- CPU core
- QingKe 32-bit RISC-V3C core @ up to 100 MHz (RV32IMBC instruction set and custom instructions)
- Low-power 3-stage pipeline
- High-speed interrupt response mechanism
- Memory – 12KB SRAM
- Storage – 256KB non-volatile memory
- 240KB code flash (user application)
- 8KB system boot program memory area for bootloader
- 8KB for configuration (InfoFlash)
- Wireless
- 2.4GHz RF transceiver and baseband and link control
- Support GFSK digital modulation and demodulation
- Rx sensitivity – -95dBm, programmable
- Tx power – Up to +7.5dBm
- CH572 only – Bluetooth LE 5.0 with support for up to 2 Mbps data rates
- Peripherals
- USB 2.0 host/device controller and PHY
- Up to 12x GPIO, one with 5V signal input
- 1x UART up to 12.5 Mbps
- 1x SPI, 1x I2C
- 6x PWM (1x 26-bit, 4x 15-bit)
- 20-channel key detection (10-channel matrix area keys and 10-channel independent area keys)
- Analog – “16-speed” reference voltage, equivalent to 4-bit ADC.
- Timers
- 26-bit timer
- 2x watchdog timers (independent and window)
- 32-bit system timer
- Debugging – 1-wire/2-wire serial debug
- Security – AES-128 encryption and decryption, unique chip ID
- Misc – RTC
- Power management
- Built-in 5V to 3.3V regulator LDO5V
- Single 5V supply rated voltage: 5V
- Or single VDD33 power supply rated voltage: 3.3V
- Power Consumption
- Idle mode: 1.7mA
- Halt mode: 1.3mA (PLL/HSE not stopped)
- 420uA (PLL/HSE stopped)
- Sleep mode: 0.46uA~1.2uA multiple gears
- Shutdown mode: 0.3uA~0.9uA multiple gears
- Optional low-power battery voltage and low voltage monitoring
- Packages – TSSOP16 (5×4.4mm), QFN20 (3x3mm), SOP8 (5×3.9mm), DFN10X3 (3x3mm)
You’ll find the datasheet on the WCH website, but not much else for now. If you are interested, Patrick plans to give away 10,000 chips and 5,000 evaluation boards for free. It will be offered on AliExpress with the voucher code shared on the aforelinked thread on X. If you have an address in China, you can DM him directly.
There are, however, more details on GitHub with PDF schematics, code samples in C for the MounRiver IDE, and documentation in Chinese. The development board is based on the CH572 RISC-V MCU and features a USB-C port, two 16-pin GPIO headers, a PCB antenna, Reset and Download buttons, and a power LED.
Jean-Luc started CNX Software in 2010 as a part-time endeavor, before quitting his job as a software engineering manager, and starting to write daily news, and reviews full time later in 2011.
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