Posted on by Jean-Luc Aufranc (CNXSoft) - 27 Comments on What is PVTM? Or why your Rockchip RK3588 CPU may not reach 2.4 GHz

What is PVTM? Or why your Rockchip RK3588 CPU may not reach 2.4 GHz

While the Rockchip RK3588 processor is advertised as reaching 2.4 GHz, not all RK3588 chips may achieve this frequency. The keyword is PVTM (Process-Voltage-Temperature Monitor), and we’ll try to explain why it does, and why some of the RK3588 processors may only be clocked at about 2.3 GHz, while others will run fine at 2.4 GHz.

This all started with Rock 5B SBC debug party, where we noticed our boards did not reach the same frequency. Willy Tarreau noted the “pvtm” value was different between our boards:

  • Willy’s board: (Cortex-A76 cluster 1 @ 2,304 MHz, cluster 2 @ 2,352 MHz)
  • CNXSoft board (Cortex-A76 cluster 1 @ 2,304 MHz, cluster 2 @ 2,304 MHz) :
  • Thomas Kaiser (tkaiser) board: (Cortex-A76 cluster 1 @ 2,400 MHz, cluster 2 @ 2,400 MHz)

For reference, CPU 0 to 3 are Cortex-A55 cores, CPU 4-5 are two Cortex-A76 cores (cluster 1), and CPU 6-7 are two Cortex-A76 cores (cluster2). The frequencies reported above are Operating Performance Point (OPP) reported by the kernel, but the actual measured frequency in SBC-Bench.sh script may differ:

  • CNXSoft board:
  • Thomas board

What’s really odd is that we have different OPP frequencies. Thomas’ Cortex-A76 cores are set up to 2,400 MHz, but are only measured to 2,348 MHz. It’s still better than the 2304 and 2,298 MHz measured on my system.

We’ll see if we can find more details about pvtm in the Rockchip RK3588 TRM (and SDK). It can indeed be found in Chapter 17 entitled “Process-Voltage-Temperature Monitor (PVTM)” of TRM Part 2.

Rockchip PVTM
PVTM block diagram with apb_slv APB slave interface with 32-bit bus width, and PVTM engine

As described in the technical reference manual:

The Process-Voltage-Temperature Monitor (PVTM) is used to monitor the chip performance variance caused by chip process, voltage, and temperature.
PVTM supports the following features:

  • A clock oscillation ring is integrated and used to generate a clock like signal, the frequency of this clock is determined by the cell delay value of clock oscillation ring circuit.
  • A calculation logic is used to measure the frequency of the clock oscillation ring.
  • Follow PVTM blocks are supported:
    • BIGCORE0_PVTM, used near A76_0/1
    • BIGCORE1_PVTM, used near A76_2/3
    • LITCORE_PVTM, used near DSU and A55_0/1/2/3
    • NPU_PVTM, used near NPU
    • GPU_PVTM, used near GPU
    • PMU_PVTM, used near PMU

So that means not only the three CPU clusters (1x Cortex-A55 and 2x Cortex-A76) frequencies are impacted by the PVTM, but also the GPU and NPU frequencies, while for the PMU it appears to be used for low power modes as an alternative to a 32KHz clock source. The documentation further explains there are two methods of calculation (manual and auto):

A clock is generated by the oscillation ring and a frequency fixed clock clk_pvtm is used to calculate the cycles of the clock. Supposing the time period is 1s, then the clock period of oscillation ring clock is T= 1/clock_counter(s), the cell delay value is T/2.
For manual mode, user can only get one frequency result for a calculation.
For auto mode, user can set the calculation times, and get the maximum, minimum and average frequency during calculation. It also supports to generate an interrupt when the minimum or average frequency below a threshold. The threshold can be configured.

Every chip will be slightly different during manufacturing, and some may be able to reach 2.4 GHz while others not. The room temperature may also impact the performance. I’m based in the North of Thailand, and my room temperature is usually around 28°C, so it’s not impossible that my board can reach 2.4 GHz in winter (about 20°C in the morning), but is limited to about 2.3 GHz for the rest of the year…

The PVTM is probably used in conjunction with the PVTPLL (Chapter 18) which is “used to monitor the chip performance variance caused by chip process, voltage, and temperature, and generate a set of reference signals for adjusting the voltage of the chip.

I also wanted to check RK3588 Linux SDK on Gitlab as well, but I’ve just requested access from Rockchip, so we have to wait. Having said that the PVTM is not a new thing and I could find a patch submitted to mainline Linux in 2018 for the RK3288 processor, but I’ve just only noticed now. The Rockchip’s Linux CPUFreq driver documentation also mentions PVTM and how it assigns OPP values:

Rockchip’s CPUFreq driver attempts to read leakage value from eFuse and get frequency count from pvtm, then supplies the OPP framework with ‘prop’ information which is used to determine opp-microvolt-<name>property of OPPS when it is parsed by the OPP framework. This is based on operating-points-v2, but the driver can also create the “cpufreq-dt” platform_device to compatibility with operating-points.

Companies will sometimes create new part numbers for chips with the same functionality but different frequencies and Rockchip did that for RK3399K @ 2.0 GHz, RK3399 @ 1.8 GHz, and RK3399-T @ 1.5 GHz, but the small differences we’re seeing between Rockchip RK3588 processors probably did not warrant naming a new part, or it may come up later on.

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