congatec conga-STDA4 is a SMARC Computer-on-Module (CoM) based on Texas Instruments TDA4VM or DRA829J Jacinto 7 processor with two Cortex-A72 cores, six real-time Cortex-R5 cores for functional safety, accelerated vision and AI processing capabilities, and plenty of interfaces.
The first Texas Instruments-powered CoM from the company is designed for industrial mobile machinery requiring near-field analytics, such as automated guided vehicles and autonomous mobile robots, construction and agricultural machinery, as well as any industrial or medical solutions requiring energy-efficient computer vision at the edge.
conga-STDA4 specifications:
- SoC – Texas Instruments Jacinto 7 TDA4VM/DRA829J with
- Dual-core Arm Cortex-A72 up to 2.0 GHz
- 6x Arm Cortex-R5F cores @ 1.0 GHz
- up to 8 MB of on-chip L3 RAM
- 1x C7x DSP up to 80 GFLOPs
- 2x C66 DSPs up to 40 GFLOPs
- Up to 8 TOPS MMA AI accelerator
- PowerVR Rogue 8XE GE8430 3D GPU with support for OpenGL ES 3.1, OpenVX, OpenCL
- VPU up to 4k60p H.264 encode / Full-HD H.265 decode
- System Memory – Up to 8 GB onboard LPDDR4x memory | 3733 MT/s | inline ECC
- Storage – eMMC 5.1 up to 128 GB configurable as pseudo-SLC
- Networking
- 2x Gigabit Ethernet PHY with IEEE 1588 support
- Optional industrial onboard Ublox WiFi/BT module
- 314-pin MXM 3.0 connector
- 1x SDIO 3.0
- Display I/F
- Dual-channel 24-bit LVDS
- DisplayPort 1.4 with support for up to 3 Full HD 1080p displays via MST
- Optional 4-lane MIPI-DSI shared with LVDS
- Up to 1x Ultra-HD or 4x Full-HD 60fps display resolution
- Up to 2x independent display outputs
- Camera
- 2x 4-lane MIPI-CSI
- 2x integrated Image Signal Processor (ISP) for MIPI-CSI cameras
- Audio – 2x I2S
- Networking – 2x GbE
- USB – 1x dual-role USB 2.0, 2x USB 2.0, 2x USB 3.0
- PCIe – 2x PCIe 3.0 x1 + 1x PCIe 3.0 x2 or up to 4x PCIe 3.0 x1
- Low-speed I/Os – 2x I²C, 2x SPI, 4x UART (2x with Handshake), 2x CAN FD, 14x GPIOs
- Security
- Customer programmable root key, up to RSA-4K or ECC-512
- Crypto hardware accelerators, PKA with ECC, AES, SHA, RNG, DES and 3DES
- High Assurance Boot support (optional)
- Encryption Engine AES-128, AES-256, TRNG, SHA-1, SHA-2, SHA-256, MD-5 | RSA-1
- Misc – Watchdog Timer, Console Port, High Precision Real Time Clock
- Power Consumption – 5-10W @ 5V (typ.)
- Dimensions – 82 x 50 mm (SMARC 2.1 form factor)
- Temperature Range
- Industrial – Operating: -40 to +85°C; storage: -40 to +85°C
- Commercial – Operating: 0 to +60°C; storage: -40 to +85°C
- Humidity – Operating: 10 to 90% r. H. non cond.; storage: 5 to 95% r. H. non cond.
congatec will provide a Linux BSP for the Arm Cortex-A72 cores, as well as support for Wind River VxWorks, RTOS, and QNX for the Cortex-R5 real-time cores. The TDA4VM processor also happens to be found in the Beaglebone AI-64 SBC so besides support from congatec directly, there should be public resources to help with development too. Congatec also offers two SMARC carrier boards for evaluation and early-stage software development: conga-SMC1/SMARC-ARM and conga-SEVAL.
It’s pretty hard to find differences between TDA4VM and DRA829J since the processors are virtually identical except for a few small differences as noted on TI forums:
The differences are subtle, but inside the “Capture Subsystem” section, TDA4VM has a VPAC (Vision Processing Accelerators) and DMPAC (Depth and Motion Processing Accelerators), whereas DRA829 does not.
Please also note that the full DRA829 block diagram is DRA829J, there is also DRA829V which excludes the DSPs, MMA, GPU, and video encoder/decoder. For a full comparison list, please refer to section 5, table 5-1 on the DRA829 datasheet.
congatec says the first booting samples of the conga-STDA4 SMARC TDA4VM/DRA829J Computer-on-Module are expected by mid-2023, and mass production will start sometime in 2024. Further information may be found on the product page.
Jean-Luc started CNX Software in 2010 as a part-time endeavor, before quitting his job as a software engineering manager, and starting to write daily news, and reviews full time later in 2011.
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Good luck writing code for this monstrosity. Four different CPU architectures in one package.
It will be such a joy to debug.
I have the feeling that anyone thinking of using this already has existing code for the DSPs and probably the R5F cores. The two A72’s are there for new UI kind of functionality for an old app running on the other cores. It probably makes a lot more sense if you look at where it fits into the historical product line. I don’t know though, bucause I haven’t paid much attention to TI’s DSPs since the late 80’s.
That’s a very very specialized product.
Those TI boards tend to be really cool, but due to their prices it’s really impossible for hobbyists, which is a really big pity as I really wish I could play with those specialized hardware.
The cheapest board with one of those processors is probably the Beaglebone AI-64 for around $190.
Ah, that’s actually not too bad, thank you for the information.
Price-wise it does compete with the more expensive RK3588 boards(an orange pi 5 is much cheaper though), but while it’s really no match in CPU, the accelerators and everything else(like the presence of real time cores) more than make up for it, if you need that in your application/project.
Is there any development guide for this board?
A very basic guide was found at their website docs. Is there any other resource for the development?