OSZU3 System-in-Package (SiP) combines AMD Xilinx Zynq UltraScale+ MPSoC with 2GB RAM, PMIC, passive components

Octavo Systems has collaborated with AMD Xilinx for the OSZU3 system-in-package (SiP) that combines Zynq UltraScale+ MPSoC ZU3 with up to 2GB RAM, power management circuitry, and other components into a compact (40×20.5mm) 600-ball BGA package.

We’ve already written about other Octavo Systems SiPs in the past with solutions like OSD3358x (TI Sitara AM3358) and OSD32MP15x (STMicro STM32MP1), but the OSZU3 packs a much more powerful and flexible chip with the AMD Xilinx Zynq UltraScale+ MPSoC offering both Cortex-A53 & Cortex-R5F cores, Arm Mali-400 GPU, and FPGA fabric.

Octavo Systems OSZU3 SiP specifications:

• SoC – AMD Xilinx Zynq UltraScale+ MPSoC ZU3 with
  • CPU – 4x Arm Cortex-A53 up to 1.2GHz, 2x Arm Cortex-R5F up to 500MHz
  • GPU – Arm Mali-400
  • FPGA
    • 154K System Logic Cells
    • 141K Flip-Flops
    • 71K CLB LUTs
    • 360 DSP Slices
    • 7.6 Mb Block RAM
• System Memory – 2GB LPDDR4
• Storage – 128MB SQPI, and 4K EEPROM (by default)
• Over one hundred passives
• MEMS Oscillators
• Peripherals
  • PCIe Gen2, USB 3.0, SATA 3.1, DisplayPort, Gigabit Ethernet
  • USB 2.0,  SD/SDIO,  UART, CAN 2.0B,  I2C,  SPI
  • 78x MIO
  • 96x HD I/O, 156x HP I/O
• Power Management
  • 2x Infineon IRPS5401 PMICs, 2x LDO
  • Power Input – 4.5V-5.5V Input
  • Power Output – 2x Programmable Buck
• Package – 40x 20.5mm 600-ball (20 x 30 grid) 1mm pitch BGA package

The company says the BGA Package is almost 60% smaller than a typical implementation in discrete chip-down components, so like the company’s other system-in-packages, the AMD Xilinx SiP is designed for space-constrained applications.

The Octavo Systems OSDZU3-REF development platform for the OSDZU3 is not exactly small, but it’s not its purpose, with the full-features board based on the UltraZED PCIe carrier card providing plenty of peripherals and expansion headers to fully evaluate the OSDZU3 SiP.

The board features USB Type-C and USB 3.0 connectors, a SATA connector, a DisplayPort video output, and Gigabit Ethernet interface, and for expansion, an FMC low pin count connector and two PMOD headers are also offered.  The development board also supports LVDS touchscreen displays, and ships with DesignLinx Peta Linux Distribution with various demos including an AI demo.

Most of the documentation for the OSZU3 SiP and development board is only available after requesting beta access, and the company asks interested parties to request a quote in order to get pricing. Engineering Samples are available now, while the OSDZU3-REF reference platform will be available to the general market in Q3 2022, the OSDZU3 should enter production by the end of 2022. More details may be found on the product page and announcement.

Jean-Luc Aufranc (CNXSoft)

Jean-Luc started CNX Software in 2010 as a part-time endeavor, before quitting his job as a software engineering manager, and starting to write daily news, and reviews full time later in 2011.

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