RISC-V free and open architecture has gained traction in the last couple of years. SiFive has been one of the most active companies with RISC-V architecture, introducing Freedom U500 and E500 open source RISC-V SoCs in the summer of 2016, before launching their own HiFive1 Arduino compatible board, and later the official Arduino Cinque board.
That’s fine if you are happy with MCU class boards, but RISC-V is getting into more powerful processors, and recently got initial support o Linux 4.15, so it should come as no surprise the company has now launched HiFive Unleashed, the first RISC-V-based, Linux-capable development board.
HiFive Unleashed key features and specifications:
- SoC – SiFive Freedom U540 with 4x U54 RV64GC application cores @ up to 1.5GHz with Sv39 virtual memory support, 1x E51 RV64IMAC Management Core, 2 MB L2 cache; 28 nm TSMC process
- System Memory – 8GB DDR4 with ECC
- Storage – 32MB Quad SPI Flash from ISSI, MicroSD card for removable storage
- Connectivity – Gigabit Ethernet port
- Debugging – Micro USB port connector to FTDI chip
- Expansion – FMC Connector for future add-in cards
- Misc – On-off switch, various configuration jumpers
- Power Supply – 12V DC input
- Dimensions – TBD
The board is mostly for developers and enthusiasts and currently the main use cases including building a RISC-V computer, adding features to Linux, or port packages to a Linux distribution. It’s unlikely to be a plug and play board suitable for anybody, at least at the beginning.
The company simultaneously unveiled & showcased the board at FOSDEM 2018 (See embedded video below), and launched it on CrowdSupply with a symbolic $1 funding goal. The downside is that as with most new technologies it’s pretty expensive at first, and you’d have to pledge $999 to get the board shipped at the end of June 2018, or $1,250 to get one of the first 75 boards in March/April 2018. Shipping is free to the US, but adds another $40 to the rest of the world. More details may eventually be available in the product page.
Jean-Luc started CNX Software in 2010 as a part-time endeavor, before quitting his job as a software engineering manager, and starting to write daily news, and reviews full time later in 2011.
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That’s a very unusual DRAM layout. Also, how does 5 chips add up to 8GB of RAM?
This looks more like a debugging board than a developer board though.
please read
> 8GB DDR4 with ECC
@ulli-kroll
I had never really looked into ECC RAM in details. I did not even know it would add one extra memory chip as shown as
https://www.pugetsystems.com/labs/articles/Advantages-of-ECC-Memory-520/
@ulli-kroll
Right, fair enough, but even so, this is not a good memory layout, as you want as equal trance lengths as possible for DRAM and this is anything but equal trance lengths by the looks of it.
It’s possible that they’ve done some super complex traces here, but normally you’d place the memory chips in an L shape or similar to achieve this, not a stack like this.
Shame Google will not work with them to get Android working on the CPU andded to a good GPU and drivers. ( provided power and performance can match or beat ARM )
I wonder if Google is more focused on chromeos now as their main attention. I just saw on another feed, they were about ready to push it out for pads.
Not sure if it is pure and free of linux underneath, however assuming it is, that would be what they’d probably concentrate on.
Android would be great though, agree with you on that.
@theguyuk
@jim st
That SoC is mostly some processor cores, Ethernet, DDR4 memory interface, and storage interfaces. There are also some other peripheral, but no display block, no GPU. So it’s not quite suitable for Android or Chrome OS.
We may have to wait a few more years before getting a RISC-V SoC with multimedia and display support.
@TLS
Chances are there are 4 more RAM devices on the other side of the board, as ECC normally comes at an 8:1 data-to-integrity bits ratio, and from what I can see on the picture, all RAM devices are identical.
@jim st Yes Google seem intent on Android for Phones. Android TV for media players. Chrome OS for portables. Gives them a fragmented set of vertical markets, maybe Google see it as a means to counter Microsoft entrance to those markets and or keep free Linux out of those markets. Google could of just added Android features to Linux over time, but I assume, guess that opens the market to other manufacturers, sellers to much. Many alternatives to Android have just failed, I still have a Firefox OS phone here at my home ( really I should fash it to… Read more »
@Jean-Luc Aufranc (CNXSoft) Yes Risc-V are playing a long game I agree. Could they add a full standard PCI-e slot or two, you still need drivers but at least you could plug in peripheral cards, as long as power needs are met? Could they even do a emulator in Linux or on Android for people to write, learn and explore the instruction set? No real use for speed or real coding but as a training aid. Back in the 8bit days you could buy emulators to get you use to programming in machine code. The emulator ran on a Sinclair… Read more »
@theguyuk
To explore the RISC V instruction set(s) you don’t need an emulator. Start with sifive „Freedom Studio v20180122 (beta3)“ (based on eclipse, gcc, ..) for Win/macOS/Linux or with GNU MCU Eclipse or with SEGGER or … all of them supports the Risc V instruction sets free of charge. https://www.sifive.com/products/tools/
@TLS
DDR4, so fly-by layout and self-calibrating delay are part of the standard.
@Jonathan
self calibrating delay in DDR4 ?, cool
sad to say, I was not at the RISC-V talk, at the same time the AV1 talk was more interesting.
Umm, why would anyone want Android on this? Even if it had video out?
A shitty proprietary fork of GNU/Linux, oh old me back!
Why not implement a scheme where, with some algorithm , the more customers, the less expensive it is ? I understand the initial price , but if enough customers, the price should go down a bit ?
> but adds another $40
This killed the deal for me.
@TLS
That’s a good point. The chips are equal. So, maybe its 10GB? Or only 5GB? Who knows. You should ask them.
@TLS
I can’t see the whole traces. Not all of them. Maybe they are equal. Maybe they just added some extra length to the first ones. That’s generally okay, if the length is equal. L shape is maybe cleaner and a best practice.
What are the SMA ports for?