ARM has introduced their very first ARMv8-R real-time 32-bit CPU core with Cortex-R52 designed for safety-critical applications in the automotive, industrial and health-care markets. It has been designed to address higher workloads with increased performance (up to 35%) compared to Cortex-R5 processor.
The processor should be used in systems capable of fulfilling IEC 61508 SIL 3 and ISO 26262 ASIL D functional safety requirements. ARM explains the new processor address both random errors for example bit flipping from radiation, and systemic errors more related to software or design faults.
The latter can be addresses with the right development processes, including following aforementioned functional safety standards, but random errors require some extra hardware features such as ECC memory, or dual core lock step processors, where instructions are run on two processors simultaneously and results compared.
Normally, the whole software stack must be validated and certified on safety-critical systems, even for part of the code that may not be safety-critical. This is a time-consuming and costly endeavor however, and as software becomes ever more complex becomes an issue. So Cortex R52 cores also implement a Level 2 MPU running monitor or hypervisor software, which can help separating safety code, critical safety code and non-safety code.
Cortex-R52 cores would typically be used in conjunction with Cortex-A cores running non-safety code, and offering higher performance, throughput, and more peripherals. Some current processors featuring Cortex-Rxx cores include Xilinx Zynq UltraScale+ MPSoC (Cortex-R5), and Renesas R-Car H3 automotive SoC (Cortex-R7).
You may want to visit ARM Cortex-R52 product page for a few more details.
Jean-Luc started CNX Software in 2010 as a part-time endeavor, before quitting his job as a software engineering manager, and starting to write daily news, and reviews full time later in 2011.
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http://www.bitkistl.com/2017/01/defect-safety-first-defect2017301291714.html